summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorScott Williams <scwilliams@nvidia.com>2012-03-08 09:34:45 -0800
committerDan Willemsen <dwillemsen@nvidia.com>2013-09-14 12:10:14 -0700
commit4a4ccf93a48c0fff108da33ea6c0c79a7e67e321 (patch)
tree7558cbaf25b57eb53ea7cc2f7048e6ef102d0919
parent16f1e10b2a0b20677ba192878a417815675eeb3c (diff)
ARM: mm: Add support for ARM debug arch v7.1
Bug 885613 Change-Id: I283f0ed737951e16fbf1cd9b0d0e1f2bc568bf49 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/88856 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Rebase-Id: Rd8b2eb11fc71ec2c55f18403b56de1227ead113f
-rw-r--r--arch/arm/mm/Kconfig9
-rw-r--r--arch/arm/mm/proc-v7.S38
2 files changed, 41 insertions, 6 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 111152e913a1..93028fe277cf 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -940,6 +940,15 @@ config ARM_SAVE_DEBUG_CONTEXT
This option enables save/restore of the ARM debug registers
across CPU powerdown.
+config ARM_SAVE_DEBUG_CONTEXT_NO_LOCK
+ bool "Don't lock out debugger access when saving debug context"
+ depends on ARM_SAVE_DEBUG_CONTEXT
+ help
+ This option allows debugging of the code that saves/restores
+ the ARM debug registers across CPU powerdown. This option
+ should not be selected unless you are actively debugging
+ the context save/restore code. If unsure, say N.
+
config CPA
bool "Change Page Attributes"
depends on CPU_V7
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 349336e1f31a..493fd78bac9e 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -147,6 +147,15 @@ ENTRY(cpu_v7_do_suspend)
stmia r0!, {r6 - r11}
#ifdef CONFIG_ARM_SAVE_DEBUG_CONTEXT
+ /* If Debug Architecture v7.1 or later, set OS lock. */
+ mrc p15, 0, r11, c0, c1, 2 @ ID_DFR0
+ and r11, r11, #0xF @ coprocessor debug model
+ cmp r11, #5 @ debug arch >= v7.1?
+#ifndef CONFIG_ARM_SAVE_DEBUG_CONTEXT_NO_LOCK
+ ldrge r4, =0xC5ACCE55 @ Lock value
+ mcrge p14, 0, r4, c1, c0, 4 @ DBGOSLAR
+ isb
+#endif
/* Save CP14 debug controller context */
mrc p14, 0, r4, c0, c2, 2 @ DBGDSCRext
@@ -155,9 +164,9 @@ ENTRY(cpu_v7_do_suspend)
mrc p14, 0, r7, c7, c9, 6 @ DBGCLAIMCLR
stmia r0!, {r4-r7}
- mrc p14, 0, r4, c0, c10, 0 @ DBGDSCCR
- mrc p14, 0, r5, c0, c11, 0 @ DBGDSMCR
- stmia r0!, {r4-r5}
+ mrclt p14, 0, r4, c0, c10, 0 @ DBGDSCCR (debug arch v7 only)
+ mrclt p14, 0, r5, c0, c11, 0 @ DBGDSMCR (debug arch v7 only)
+ stmltia r0!, {r4-r5} @ (debug arch v7 only)
tst r4, #(1 << 29) @ DBGDSCRext.TXfull
mrcne p14, 0, r4, c0, c3, 2 @ DBGDTRTXext
@@ -257,6 +266,16 @@ ENTRY(cpu_v7_do_resume)
isb
#ifdef CONFIG_ARM_SAVE_DEBUG_CONTEXT
+ /* If Debug Architecture v7.1 or later, set OS lock. */
+ mrc p15, 0, r11, c0, c1, 2 @ ID_DFR0
+ and r11, r11, #0xF @ coprocessor debug model
+ cmp r11, #5 @ debug arch >= v7.1?
+#ifndef CONFIG_ARM_SAVE_DEBUG_CONTEXT_NO_LOCK
+ ldrge r4, =0xC5ACCE55 @ Lock value
+ mcrge p14, 0, r4, c1, c0, 4 @ DBGOSLAR
+ isb
+#endif
+
/* Restore CP14 debug controller context */
ldmia r0!, {r2 - r5}
@@ -264,9 +283,9 @@ ENTRY(cpu_v7_do_resume)
mcr p14, 0, r4, c0, c7, 0 @ DBGVCR
mcr p14, 0, r5, c7, c8, 6 @ DBGCLAIMSET
- ldmia r0!, {r4-r5}
- mcr p14, 0, r4, c0, c10, 0 @ DBGDSCCR
- mcr p14, 0, r5, c0, c11, 0 @ DBGDSMCR
+ ldmltia r0!, {r4-r5} @ (debug arch v7 only)
+ mcrlt p14, 0, r4, c0, c10, 0 @ DBGDSCCR (debug arch v7 only)
+ mcrlt p14, 0, r5, c0, c11, 0 @ DBGDSMCR (debug arch v7 only)
tst r2, #(1 << 29) @ DBGDSCRext.TXfull
ldrne r4, [r0], #4
@@ -336,6 +355,13 @@ start_restore_wpt:
mcr p14, 0, r2, c0, c2, 2 @ DSCR
isb
+
+#ifndef CONFIG_ARM_SAVE_DEBUG_CONTEXT_NO_LOCK
+ mov r4, #0 @ non-lock value
+ cmp r11, #5 @ debug arch >= v7.1?
+ mcrge p14, 0, r4, c1, c0, 4 @ DBGOSLAR
+ isb
+#endif
#endif
dsb
mov r0, r8 @ control register