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authorPaul Burton <paul.burton@mips.com>2018-11-07 23:05:07 +0000
committerPaul Burton <paul.burton@mips.com>2018-11-07 16:25:30 -0800
commit57810ecb581aec8008ad579013c0755c7acaf490 (patch)
tree42514557ab6e1118e0256e79b357122401a7ffee
parent52d6d05575c3ad812ad92e558ef12b334de3cfaa (diff)
MIPS: Remove GCC_IMM_ASM & GCC_REG_ACCUM macros
asm/compiler.h defined GCC_IMM_ASM & GCC_REG_ACCUM macros, both of which are defined differently for GCC pre-3.4 or GCC 3.4 & higher. We only support building with GCC 4.6 & higher since commit cafa0010cd51 ("Raise the minimum required gcc version to 4.6"), which makes the pre-3.4 definition dead code. Rather than leave the macro definitions around, inline the GCC 3.4 & higher definitions into the single file that uses them & remove the macros entirely. Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/21000/ Cc: linux-mips@linux-mips.org
-rw-r--r--arch/mips/include/asm/compiler.h8
-rw-r--r--arch/mips/kernel/cpu-bugs64.c4
2 files changed, 2 insertions, 10 deletions
diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h
index cc2eb1b06050..9196fca4335d 100644
--- a/arch/mips/include/asm/compiler.h
+++ b/arch/mips/include/asm/compiler.h
@@ -43,14 +43,6 @@
#undef barrier_before_unreachable
#define barrier_before_unreachable() asm volatile(".insn")
-#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
-#define GCC_IMM_ASM() "n"
-#define GCC_REG_ACCUM "$0"
-#else
-#define GCC_IMM_ASM() "rn"
-#define GCC_REG_ACCUM "accum"
-#endif
-
#ifdef CONFIG_CPU_MIPSR6
/* All MIPS R6 toolchains support the ZC constrain */
#define GCC_OFF_SMALL_ASM() "ZC"
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index c9e8622b5a16..bada74af7641 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -39,7 +39,7 @@ static inline void align_mod(const int align, const int mod)
".endr\n\t"
".set pop"
:
- : GCC_IMM_ASM() (align), GCC_IMM_ASM() (mod));
+ : "n"(align), "n"(mod));
}
static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
@@ -92,7 +92,7 @@ static inline void mult_sh_align_mod(long *v1, long *v2, long *w,
".set pop"
: "=&r" (lv1), "=r" (lw)
: "r" (m1), "r" (m2), "r" (s), "I" (0)
- : "hi", "lo", GCC_REG_ACCUM);
+ : "hi", "lo", "$0");
/* We have to use single integers for m1 and m2 and a double
* one for p to be sure the mulsidi3 gcc's RTL multiplication
* instruction has the workaround applied. Older versions of