arm64: dts: Add mxc-jpeg decoder/encoder nodes for imx8qxp/qm

Add jpeg decoder/encoder nodes imx8qxp & imx8qm.

At this stage, labgrid tests pass on imx8qxp/qm.
Also, basic v4l2-compliance tests pass on imx8qxp/qm.

Signed-off-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>

3 files changed, 42 insertions, 14 deletions

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
index 7faf3fe48fd8..b155b2878bca 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
@@ -478,41 +478,53 @@ img_subsys: bus@58000000 {
 		};
 
 		jpegdec: jpegdec@58400000 {
-			reg = <0x58400000 0x00050000>;
+			compatible = "fsl,imx8-jpgdec";
+			reg = <0x58400000 0x00050000 >;
 			interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
-				 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
+			clocks = <&img_jpeg_dec_clk 0>,
+				 <&img_jpeg_dec_clk 1>;
 			clock-names = "per", "ipg";
-			assigned-clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
-					  <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
-			assigned-clock-rates = <200000000>, <200000000>;
-			power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
+			assigned-clocks = <&img_jpeg_dec_clk 0>,
+					  <&img_jpeg_dec_clk 1>;
+			assigned-clock-rates = <200000000>;
+			power-domains = <&pd IMX_SC_R_ISI_CH0>,
+					<&pd IMX_SC_R_MJPEG_DEC_MP>,
 					<&pd IMX_SC_R_MJPEG_DEC_S0>,
 					<&pd IMX_SC_R_MJPEG_DEC_S1>,
 					<&pd IMX_SC_R_MJPEG_DEC_S2>,
 					<&pd IMX_SC_R_MJPEG_DEC_S3>;
+			power-domain-names = "pd_isi_ch0", "pd_dec_mp",
+					     "pd_dec_s0", "pd_dec_s1",
+					     "pd_dec_s2", "pd_dec_s3";
+			status = "disabled";
 		};
 
 		jpegenc: jpegenc@58450000 {
-			reg = <0x58450000 0x00050000>;
+			compatible = "fsl,imx8-jpgenc";
+			reg = <0x58450000 0x00050000 >;
 			interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
-				 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
+			clocks = <&img_jpeg_enc_clk 0>,
+				 <&img_jpeg_enc_clk 1>;
 			clock-names = "per", "ipg";
-			assigned-clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
-					  <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
-			assigned-clock-rates = <200000000>, <200000000>;
-			power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
+			assigned-clocks = <&img_jpeg_enc_clk 0>,
+					  <&img_jpeg_enc_clk 1>;
+			assigned-clock-rates = <200000000>;
+			power-domains = <&pd IMX_SC_R_ISI_CH0>,
+					<&pd IMX_SC_R_MJPEG_ENC_MP>,
 					<&pd IMX_SC_R_MJPEG_ENC_S0>,
 					<&pd IMX_SC_R_MJPEG_ENC_S1>,
 					<&pd IMX_SC_R_MJPEG_ENC_S2>,
 					<&pd IMX_SC_R_MJPEG_ENC_S3>;
+			power-domain-names = "pd_isi_ch0", "pd_enc_mp",
+					     "pd_enc_s0", "pd_enc_s1",
+					     "pd_enc_s2", "pd_enc_s3";
+			status = "disabled";
 		};
 	};
 };
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
index 841cfc618b08..24a75b6a6a23 100755
--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts
@@ -883,6 +883,14 @@
 	};
 };
 
+&jpegdec {
+       status = "okay";
+};
+
+&jpegenc {
+       status = "okay";
+};
+
 &i2c_mipi_csi0 {
 	#address-cells = <1>;
 	#size-cells = <0>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
index 0c2fa7d0fd83..18fbfba8d68a 100755
--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
@@ -912,6 +912,14 @@
 	};
 };
 
+&jpegdec {
+	status = "okay";
+};
+
+&jpegenc {
+	status = "okay";
+};
+
 &i2c_mipi_csi0 {
 	#address-cells = <1>;
 	#size-cells = <0>;