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authorRichard Zhu <hongxing.zhu@nxp.com>2021-03-08 13:08:02 +0800
committerAndrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>2021-04-27 10:42:03 +0000
commit652b86fd2b84d347b2e00674acd60b32191e12cc (patch)
treec8d8e01665708071cdec93bb3c6a3522aa94339a
parent58b5e9c2278e444923b5c5994cc6256aabc642d5 (diff)
MLK-25334-2 PCI: imx: export one property to disable l1ss support or not
Some HW boards might not support the L1.1 ASPM, although the L1.1 ASPM is supported by the SOC chip. So, export one property to disable L1.1 ASPM supported or not. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Jun Li <jun.li@nxp.com> (cherry picked from commit 4e42c418396d545a48a4eb47a04ce73a27b0415e) (cherry picked from commit 3edfbde763cc6a7a687344a6207e12c10de04542) Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
-rw-r--r--drivers/pci/controller/dwc/pci-imx6.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 059ad3ea9b98..0b3a65b8a798 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -2446,6 +2446,10 @@ static int imx6_pcie_probe(struct platform_device *pdev)
imx6_pcie->ext_osc = 0;
if (of_property_read_u32(node, "local-addr", &imx6_pcie->local_addr))
imx6_pcie->local_addr = 0;
+ if (of_property_read_bool(node, "l1ss-disabled"))
+ imx6_pcie->l1ss_clkreq = 0;
+ else
+ imx6_pcie->l1ss_clkreq = 1;
/* Fetch GPIOs */
imx6_pcie->clkreq_gpio = of_get_named_gpio(node, "clkreq-gpio", 0);
@@ -2932,6 +2936,10 @@ static void imx6_pcie_l1ss_quirk(struct pci_dev *dev)
if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_SUPPORTS_L1SS))
return;
+ /* Make sure the L1SS is not force disabled. */
+ if (imx6_pcie->l1ss_clkreq == 0)
+ return;
+
reg = dw_pcie_find_ext_capability(pci, PCI_EXT_CAP_ID_L1SS);
rc_l1sub = dw_pcie_readl_dbi(pci, reg + PCI_L1SS_CAP);