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authorGary King <gking@nvidia.com>2009-12-09 16:42:38 -0800
committerGary King <gking@nvidia.com>2009-12-09 19:42:38 -0800
commit6fad4f8b483a4ba5e5723ecfdf5744f55dca59f2 (patch)
tree2c961c8e770987da52699a84981c863a9f97bd31
parentbff91c10353c009ffc161cebbe6555da06a14745 (diff)
tegra: add USB clock and PHY programming interface for USB device
Change-Id: I37fea0ee06525d9894020d6a161a615c07c4e8e8
-rw-r--r--drivers/usb/gadget/Makefile3
-rw-r--r--drivers/usb/gadget/fsl_usb2_udc.h5
-rw-r--r--drivers/usb/gadget/tegra_udc.c74
3 files changed, 81 insertions, 1 deletions
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 878fee0da68e..469c2126249d 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -18,7 +18,8 @@ obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o
obj-$(CONFIG_USB_AT91) += at91_udc.o
obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o
obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o
-obj-$(CONFIG_USB_TEGRA) := fsl_udc_core.o
+obj-$(CONFIG_USB_TEGRA) += fsl_udc_core.o
+obj-$(CONFIG_USB_TEGRA) += tegra_udc.o
fsl_usb2_udc-objs := fsl_udc_core.o
ifeq ($(CONFIG_ARCH_MXC),y)
fsl_usb2_udc-objs += fsl_mx3_udc.o
diff --git a/drivers/usb/gadget/fsl_usb2_udc.h b/drivers/usb/gadget/fsl_usb2_udc.h
index 038e448dde01..ab31468749bd 100644
--- a/drivers/usb/gadget/fsl_usb2_udc.h
+++ b/drivers/usb/gadget/fsl_usb2_udc.h
@@ -597,10 +597,15 @@ struct platform_device;
#define platform_udc_clk_init _UDC_NAME##_udc_clk_init
#define platform_udc_clk_finalize _UDC_NAME##_udc_clk_finalize
#define platform_udc_clk_release _UDC_NAME##_udc_clk_release
+#define platform_udc_clk_suspend _UDC_NAME##_udc_clk_suspend
+#define platform_udc_clk_resume _UDC_NAME##_udc_clk_resume
+
extern int platform_udc_clk_init(struct platform_device *pdev);
extern void platform_udc_clk_finalize(struct platform_device *pdev);
extern void platform_udc_clk_release(void);
+extern void platform_udc_clk_suspend(void);
+extern void platform_udc_clk_resume(void);
#else
static inline int platform_udc_clk_init(struct platform_device *pdev)
{
diff --git a/drivers/usb/gadget/tegra_udc.c b/drivers/usb/gadget/tegra_udc.c
new file mode 100644
index 000000000000..7e6c890fb020
--- /dev/null
+++ b/drivers/usb/gadget/tegra_udc.c
@@ -0,0 +1,74 @@
+/*
+ * drivers/usb/gadget/tegra_udc.c
+ *
+ * USB device controller clock and PHY programming for Tegra SoCs
+ *
+ * Copyright (c) 2009, NVIDIA Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#include "nvddk_usbphy.h"
+#include "mach/nvrm_linux.h"
+#include "nvassert.h"
+
+NvDdkUsbPhyHandle s_hUsbPhy;
+
+int tegra_udc_clk_init(struct platform_device *pdev)
+{
+ NvError nverr;
+ NvDdkUsbPhyIoctl_VBusStatusOutputArgs Status;
+
+ nverr = NvDdkUsbPhyOpen(s_hRmGlobal, pdev->id, &s_hUsbPhy);
+ if (nverr != NvSuccess)
+ return -ENODEV;
+
+ NV_ASSERT_SUCCESS(
+ NvDdkUsbPhyIoctl(s_hUsbPhy,
+ NvDdkUsbPhyIoctlType_VBusStatus,
+ NULL, &Status));
+
+ if (Status.VBusDetected) {
+ NV_ASSERT_SUCCESS(NvDdkUsbPhyPowerUp(s_hUsbPhy, 0));
+ } else {
+ NV_ASSERT_SUCCESS(NvDdkUsbPhyPowerDown(s_hUsbPhy, 0));
+ }
+ printk("tegra_udc_clk_init called\n");
+
+ return 0;
+}
+
+void tegra_udc_clk_finalize(struct platform_device *pdev)
+{
+ printk("tegra_udc_clk_finalize called\n");
+}
+
+void tegra_udc_clk_release(void)
+{
+ printk("tegra_udc_clk_release called\n");
+}
+
+void tegra_udc_clk_suspend(void)
+{
+ NV_ASSERT_SUCCESS(NvDdkUsbPhyPowerDown(s_hUsbPhy, 0));
+}
+
+void tegra_udc_clk_resume(void)
+{
+ NV_ASSERT_SUCCESS(NvDdkUsbPhyPowerUp(s_hUsbPhy, 0));
+}