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authorVladimir Barinov <vladimir.barinov+renesas@cogentembedded.com>2017-01-26 17:54:09 +0300
committerSimon Horman <horms+renesas@verge.net.au>2017-05-22 14:32:05 +0200
commit82c906fac243f1a5d99867551c0933aee414bfbb (patch)
tree0ecb17c1a385490acf6bcdd108754077ea05e348
parent2ea659a9ef488125eb46da6eb571de5eae5c43f6 (diff)
arm64: dts: m3ulcb: enable I2C
This supports I2C2 bus on M3ULCB board Signed-off-by: Vladimir Barinov <vladimir.barinov+renesas@cogentembedded.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
index 372b2a944716..5554b555b874 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts
@@ -120,6 +120,11 @@
function = "scif_clk";
};
+ i2c2_pins: i2c2 {
+ groups = "i2c2_a";
+ function = "i2c2";
+ };
+
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
@@ -182,6 +187,13 @@
clock-frequency = <14745600>;
};
+&i2c2 {
+ pinctrl-0 = <&i2c2_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
&wdt0 {
timeout-sec = <60>;
status = "okay";