diff options
| author | Richard Zhu <richard.zhu@freescale.com> | 2014-10-16 14:54:40 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:18:47 -0600 |
| commit | 85e72478ed45fa9a3f885064c68ffe8c86a7a7cd (patch) | |
| tree | ded47056c2dd91a733fa050aea2f5e4b96f82f78 | |
| parent | 8fc04b1286f63fa92ab5833790ed24c4c71141a4 (diff) | |
MLK-10009-2 ARM: imx6sx: Add imx6sx pcie related gpr bits definitions
Add imx6sx pcie related gpr bits definitions.
Signed-off-by: Richard Zhu <richard.zhu@freescale.com>
| -rw-r--r-- | include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h index dfbee1b2c641..f6515b5dd369 100644 --- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h +++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h @@ -285,6 +285,7 @@ #define IMX6Q_GPR12_DEVICE_TYPE (0xf << 12) #define IMX6Q_GPR12_PCIE_CTL_2 BIT(10) #define IMX6Q_GPR12_LOS_LEVEL (0x1f << 4) +#define IMX6Q_GPR12_LOS_LEVEL_9 (0x9 << 4) #define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30) #define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29) @@ -436,4 +437,12 @@ #define IMX6SX_GPR5_DISP_MUX_DCIC1_LCDIF1 (0x0 << 1) #define IMX6SX_GPR5_DISP_MUX_DCIC1_LVDS (0x1 << 1) #define IMX6SX_GPR5_DISP_MUX_DCIC1_MASK (0x1 << 1) + +#define IMX6SX_GPR5_PCIE_BTNRST BIT(19) +#define IMX6SX_GPR5_PCIE_PERST BIT(18) + +#define IMX6SX_GPR12_PCIE_PM_TURN_OFF BIT(16) +#define IMX6SX_GPR12_PCIE_TEST_PD BIT(30) +#define IMX6SX_GPR12_RX_EQ_MASK (0x7 << 0) +#define IMX6SX_GPR12_RX_EQ_2 (0x2 << 0) #endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */ |