diff options
| author | Clark Wang <xiaoning.wang@nxp.com> | 2019-01-29 13:49:46 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:02 +0800 |
| commit | 870fc0e0fe660aa2bd68852bae7c8cf6d5c1b14f (patch) | |
| tree | 0ab95d50064ade07d266100cd05e29cb1c240151 | |
| parent | d89f1dd6d0a8b50b50d61a03de54f4ab2ad6bc6e (diff) | |
arm64: dts: imx8qxp: add LPSPI node in adma
Add LPSPI decive in adma subsystem.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-adma.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-adma.dtsi index 954be815b4ec..62921ddbf9fe 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-adma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-adma.dtsi @@ -123,6 +123,34 @@ adma_subsys: bus@59000000 { status = "disabled"; }; + adma_lpspi0: spi@5a000000 { + compatible = "fsl,imx7ulp-spi"; + reg = <0x5a000000 0x10000>; + interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_SPI0_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_SPI0_IPG_CLK>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_ADMA_SPI0_CLK>; + assigned-clock-rates = <20000000>; + power-domains = <&pd IMX_SC_R_SPI_0>; + status = "disabled"; + }; + + adma_lpspi2: spi@5a020000 { + compatible = "fsl,imx7ulp-spi"; + reg = <0x5a020000 0x10000>; + interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + clocks = <&adma_lpcg IMX_ADMA_LPCG_SPI2_CLK>, + <&adma_lpcg IMX_ADMA_LPCG_SPI2_IPG_CLK>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_ADMA_SPI2_CLK>; + assigned-clock-rates = <20000000>; + power-domains = <&pd IMX_SC_R_SPI_2>; + status = "disabled"; + }; + adma_lpuart0: serial@5a060000 { compatible = "fsl,imx8qxp-lpuart", "fsl,imx7ulp-lpuart"; reg = <0x5a060000 0x1000>; |