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authorLiu Ying <victor.liu@nxp.com>2020-01-21 16:58:42 +0800
committerLiu Ying <victor.liu@nxp.com>2020-02-13 12:07:11 +0800
commita01340fef7c645dc41a5bb5e2c6ee8343fb3d46d (patch)
tree6c32f500fbd1d5ba10ba5f134e9a4ef6090da37f
parent93bdb133653437d6a0a519bf04ac0066a97f4605 (diff)
MLK-23252-2 clk: imx8mp: Add LDB root clock
This patch adds "media_ldb_root_clk" clock for the LDB in the MEDIAMIX subsystem. Reviewed-by: Sandor Yu <Sandor.yu@nxp.com> Signed-off-by: Liu Ying <victor.liu@nxp.com>
-rw-r--r--drivers/clk/imx/clk-imx8mp.c1
-rw-r--r--include/dt-bindings/clock/imx8mp-clock.h5
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c
index 4d68292b2013..07994e1f4320 100644
--- a/drivers/clk/imx/clk-imx8mp.c
+++ b/drivers/clk/imx/clk-imx8mp.c
@@ -831,6 +831,7 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
clks[IMX8MP_CLK_MEDIA_CAM2_PIX_ROOT] = imx_clk_gate2_shared2("media_cam2_pix_root_clk", "media_cam2_pix", base + 0x45d0, 0, &share_count_media);
clks[IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT] = imx_clk_gate2_shared2("media_disp1_pix_root_clk", "media_disp1_pix", base + 0x45d0, 0, &share_count_media);
clks[IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT] = imx_clk_gate2_shared2("media_disp2_pix_root_clk", "media_disp2_pix", base + 0x45d0, 0, &share_count_media);
+ clks[IMX8MP_CLK_MEDIA_LDB_ROOT] = imx_clk_gate2_shared2("media_ldb_root_clk", "media_ldb", base + 0x45d0, 0, &share_count_media);
clks[IMX8MP_CLK_MEDIA_ISP_ROOT] = imx_clk_gate2_shared2("media_isp_root_clk", "media_isp_div", base + 0x45d0, 0, &share_count_media);
clks[IMX8MP_CLK_USDHC3_ROOT] = imx_clk_gate4("usdhc3_root_clk", "usdhc3", base + 0x45e0, 0);
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index 07098311abe1..29e9775dd03c 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -285,8 +285,6 @@
#define IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT 274
#define IMX8MP_CLK_MEDIA_MIPI_PHY1_REF_ROOT 275
#define IMX8MP_CLK_MEDIA_ISP_ROOT 276
-/* TODO: Add LDB root */
-
#define IMX8MP_CLK_USDHC3_ROOT 277
#define IMX8MP_CLK_HDMI_ROOT 278
#define IMX8MP_CLK_XTAL_ROOT 279
@@ -300,8 +298,9 @@
#define IMX8MP_CLK_ARM 287
#define IMX8MP_CLK_A53_CORE 288
#define IMX8MP_CLK_MEDIA_DISP2_PIX 289
+#define IMX8MP_CLK_MEDIA_LDB_ROOT 290
-#define IMX8MP_CLK_END 290
+#define IMX8MP_CLK_END 291
#define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0
#define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1