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authorDmitry Osipenko <digetx@gmail.com>2019-04-12 01:12:48 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-06-11 12:23:46 +0200
commita5b2e4b6ac21396af60c9b652be1fdbd04fe33e3 (patch)
tree502708a8baaa641bf6f19ebe659097581e43eb57
parent11988047b39ad52bc455fb8ba6ad202ddcea0b24 (diff)
memory: tegra: Fix integer overflow on tick value calculation
commit b906c056b6023c390f18347169071193fda57dde upstream. Multiplying the Memory Controller clock rate by the tick count results in an integer overflow and in result the truncated tick value is being programmed into hardware, such that the GR3D memory client performance is reduced by two times. Cc: stable <stable@vger.kernel.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/memory/tegra/mc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c
index 6ab481ee8ece..8ac02b6c162f 100644
--- a/drivers/memory/tegra/mc.c
+++ b/drivers/memory/tegra/mc.c
@@ -72,7 +72,7 @@ static int tegra_mc_setup_latency_allowance(struct tegra_mc *mc)
u32 value;
/* compute the number of MC clock cycles per tick */
- tick = mc->tick * clk_get_rate(mc->clk);
+ tick = (unsigned long long)mc->tick * clk_get_rate(mc->clk);
do_div(tick, NSEC_PER_SEC);
value = readl(mc->regs + MC_EMEM_ARB_CFG);