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authorClark Wang <xiaoning.wang@nxp.com>2019-09-06 10:40:22 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2021-11-02 16:52:26 +0800
commitb09af6dfac415a786cfbc9412609dae2d9311c34 (patch)
treea23114e64a1373b59a8f91d576b6ea56c4068408
parent78959f0a94a94d375adf45bf81919a6459efc14e (diff)
ARM64: dts: Add ipg clk for all lpi2c bus
Add ipg clock config for all lpi2c bus. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi20
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi10
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi10
-rw-r--r--arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi10
4 files changed, 30 insertions, 20 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
index f946772ccf00..2b6069b9f2bb 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
@@ -202,8 +202,9 @@ dma_subsys: bus@5a000000 {
i2c0: i2c@5a800000 {
reg = <0x5a800000 0x4000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>;
- clock-names = "per";
+ clocks = <&i2c0_lpcg 0>,
+ <&i2c0_lpcg 1>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_I2C_0>;
@@ -213,8 +214,9 @@ dma_subsys: bus@5a000000 {
i2c1: i2c@5a810000 {
reg = <0x5a810000 0x4000>;
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>;
- clock-names = "per";
+ clocks = <&i2c1_lpcg 0>,
+ <&i2c1_lpcg 1>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_I2C_1>;
@@ -224,8 +226,9 @@ dma_subsys: bus@5a000000 {
i2c2: i2c@5a820000 {
reg = <0x5a820000 0x4000>;
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>;
- clock-names = "per";
+ clocks = <&i2c2_lpcg 0>,
+ <&i2c2_lpcg 1>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_I2C_2>;
@@ -235,8 +238,9 @@ dma_subsys: bus@5a000000 {
i2c3: i2c@5a830000 {
reg = <0x5a830000 0x4000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>;
- clock-names = "per";
+ clocks = <&i2c3_lpcg 0>,
+ <&i2c3_lpcg 1>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_I2C_3>;
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
index 4b1bc36fc9dc..ba3dbfe737d9 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
@@ -265,8 +265,9 @@ img_subsys: bus@58000000 {
reg = <0x58226000 0x1000>;
interrupts = <8>;
interrupt-parent = <&irqsteer_csi0>;
- clocks = <&clk IMX_SC_R_CSI_0_I2C_0 IMX_SC_PM_CLK_PER>;
- clock-names = "per";
+ clocks = <&clk IMX_SC_R_CSI_0_I2C_0 IMX_SC_PM_CLK_PER>,
+ <&img_ipg_clk>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_CSI_0_I2C_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_CSI_0_I2C_0>;
@@ -278,8 +279,9 @@ img_subsys: bus@58000000 {
reg = <0x58246000 0x1000>;
interrupts = <8>;
interrupt-parent = <&irqsteer_csi1>;
- clocks = <&clk IMX_SC_R_CSI_1_I2C_0 IMX_SC_PM_CLK_PER>;
- clock-names = "per";
+ clocks = <&clk IMX_SC_R_CSI_1_I2C_0 IMX_SC_PM_CLK_PER>,
+ <&img_ipg_clk>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_CSI_1_I2C_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_CSI_1_I2C_0>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi
index bec0a58a28ba..77ec06a441fb 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi
@@ -143,8 +143,9 @@
reg = <0x56247000 0x4000>;
interrupts = <9>;
interrupt-parent = <&irqsteer_lvds0>;
- clocks = <&lvds0_i2c0_lpcg 0>;
- clock-names = "per";
+ clocks = <&lvds0_i2c0_lpcg 0>,
+ <&lvds0_i2c0_lpcg 1>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_LVDS_0_I2C_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_LVDS_0_I2C_0>;
@@ -283,8 +284,9 @@
reg = <0x57247000 0x4000>;
interrupts = <9>;
interrupt-parent = <&irqsteer_lvds1>;
- clocks = <&lvds1_i2c0_lpcg 0>;
- clock-names = "per";
+ clocks = <&lvds1_i2c0_lpcg 0>,
+ <&lvds1_i2c0_lpcg 1>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_LVDS_1_I2C_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_LVDS_1_I2C_0>;
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi
index 572b10592794..ea1ab05a864b 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lvds.dtsi
@@ -142,8 +142,9 @@
reg = <0x56226000 0x4000>;
interrupts = <8>;
interrupt-parent = <&irqsteer_mipi_lvds0>;
- clocks = <&mipi0_i2c0_lpcg 0>;
- clock-names = "per";
+ clocks = <&mipi0_i2c0_lpcg 0>,
+ <&mipi0_i2c0_lpcg 1>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_MIPI_0_I2C_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_MIPI_0_I2C_0>;
@@ -230,8 +231,9 @@
reg = <0x56246000 0x4000>;
interrupts = <8>;
interrupt-parent = <&irqsteer_mipi_lvds1>;
- clocks = <&mipi1_i2c0_lpcg 0>;
- clock-names = "per";
+ clocks = <&mipi1_i2c0_lpcg 0>,
+ <&mipi1_i2c0_lpcg 1>;
+ clock-names = "per", "ipg";
assigned-clocks = <&clk IMX_SC_R_MIPI_1_I2C_0 IMX_SC_PM_CLK_PER>;
assigned-clock-rates = <24000000>;
power-domains = <&pd IMX_SC_R_MIPI_1_I2C_0>;