[ARM/tegra] RM: Updated hotplug request timing.

Used microsecond timer to track CPU1 On/Off delays, instead of DVFS
tick count (the latter can be stopped in LP2, resulting in CPU1 hotplug
request extension). Set On/Off delay to 1.5sec/1.0sec, respectively.

Change-Id: Idde0173f90041796ffcc0b26d865b46a48a27864
Reviewed-on: http://git-master.nvidia.com/r/4743
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Iqbal Bhinderwala <iqbalb@nvidia.com>
Reviewed-by: Gary King <gking@nvidia.com>

2 files changed, 29 insertions, 8 deletions

diff --git a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.c b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.c
index 985f8df19643..53bd8a2d3ff9 100644
--- a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.c
+++ b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.c
@@ -56,6 +56,10 @@
 // TODO: Always Disable before check-in
 #define NVRM_TEST_PMREQUEST_UP_MODE (0)
 
+// Microsecond timer access
+static void* s_pTimerUs = NULL;
+extern void* NvRmPrivAp15GetTimerUsVirtAddr(NvRmDeviceHandle hRm);
+
 /*****************************************************************************/
 // EMC MODULE INTERFACES
 /*****************************************************************************/
@@ -369,6 +373,7 @@ NvRmPrivAp20GetPmRequest(
     static NvRmFreqKHz s_Cpu1OnMinKHz = 0, s_Cpu1OffMaxKHz = 0;
     static NvU32 s_Cpu1OnPendingCnt = 0, s_Cpu1OffPendingCnt = 0;
 
+    NvU32 t;
     NvRmPmRequest PmRequest = NvRmPmRequest_None;
     NvBool Cpu1Off =
         (0 != NV_DRF_VAL(CLK_RST_CONTROLLER, RST_CPU_CMPLX_SET, SET_CPURESET1,
@@ -392,6 +397,11 @@ NvRmPrivAp20GetPmRequest(
         NV_ASSERT(s_Cpu1OnMinKHz < s_Cpu1OffMaxKHz);
     }
 
+    // Timestamp
+    if (s_pTimerUs == NULL)
+        s_pTimerUs = NvRmPrivAp15GetTimerUsVirtAddr(hRmDevice);
+    t = NV_READ32(s_pTimerUs);
+
     /*
      * Request OS kernel to turn CPU1 Off if all of the following is true:
      * (a) CPU frequency is below OnMin threshold, 
@@ -406,11 +416,14 @@ NvRmPrivAp20GetPmRequest(
     if (CpuLoadGaugeKHz < s_Cpu1OnMinKHz)
     {
         s_Cpu1OnPendingCnt = 0;
-        if (s_Cpu1OffPendingCnt < NVRM_CPU1_OFF_PENDING_CNT)
+        if ((s_Cpu1OffPendingCnt & 0x1) == 0)
         {
-            s_Cpu1OffPendingCnt++;
+            s_Cpu1OffPendingCnt = t | 0x1;  // Use LSb as a delay start flag
             return PmRequest;
         }
+        if ((t - s_Cpu1OffPendingCnt) < (NVRM_CPU1_OFF_PENDING_MS * 1000))
+            return PmRequest;
+
         if ((s_LastPmRequest & NvRmPmRequest_CpuOnFlag) && (!Cpu1Off))
             s_LastPmRequest = PmRequest = (NvRmPmRequest_CpuOffFlag | 0x1);
 #if NVRM_TEST_PMREQUEST_UP_MODE
@@ -422,11 +435,14 @@ NvRmPrivAp20GetPmRequest(
     else if (CpuLoadGaugeKHz > s_Cpu1OffMaxKHz)
     {
         s_Cpu1OffPendingCnt = 0;
-        if (s_Cpu1OnPendingCnt < NVRM_CPU1_ON_PENDING_CNT)
+        if ((s_Cpu1OnPendingCnt & 0x1) == 0)
         {
-            s_Cpu1OnPendingCnt++;
+            s_Cpu1OnPendingCnt = t | 0x1;  // Use LSb as a delay start flag
             return PmRequest;
         }
+        if ((t - s_Cpu1OnPendingCnt) < (NVRM_CPU1_ON_PENDING_MS * 1000))
+            return PmRequest;
+
         if ((s_LastPmRequest & NvRmPmRequest_CpuOffFlag) && Cpu1Off)
         {
             s_LastPmRequest = PmRequest = (NvRmPmRequest_CpuOnFlag | 0x1);
@@ -438,6 +454,11 @@ NvRmPrivAp20GetPmRequest(
             CLK_RST_CONTROLLER_RST_CPU_CMPLX_CLR_0_CLR_CPURESET1_FIELD);
 #endif
     }
+    else
+    {   // Re-start both delays inside hysteresis loop
+        s_Cpu1OnPendingCnt = 0;
+        s_Cpu1OffPendingCnt = 0;
+    }
     return PmRequest;
 }
 
diff --git a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
index 8b5c9d4ded39..3ff0bdd4eb87 100644
--- a/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
+++ b/arch/arm/mach-tegra/nvrm/core/ap20/ap20rm_power_dfs.h
@@ -236,17 +236,17 @@ extern "C"
 /**
  * Defines CPU frequency threshold for slave CPU1 power management:
  * - CPU1 is turned Off when cpu clock is below ON_MIN for
- *   ON_PENDING DFS ticks (10ms) in a row
+ *   ON_PENDING time in a row
  * - CPU1 is turned On when cpu clock is above OFF_MAX for
- *   OFF_PENDING DFS ticks (10ms) in a row
+ *   OFF_PENDING time in a row
  * If thresholds are set to 0, the values are derived at run time from the
  * characterization data
  */
 #define NVRM_CPU1_ON_MIN_KHZ (0)
 #define NVRM_CPU1_OFF_MAX_KHZ (0)
 
-#define NVRM_CPU1_ON_PENDING_CNT (250)
-#define NVRM_CPU1_OFF_PENDING_CNT (100)
+#define NVRM_CPU1_ON_PENDING_MS (1500)
+#define NVRM_CPU1_OFF_PENDING_MS (1000)
 
 /**
  * Defines AP20 Thermal policy parameters.