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authorAnson Huang <b20788@freescale.com>2014-01-13 16:17:05 +0800
committerAnson Huang <b20788@freescale.com>2014-01-20 16:16:24 +0800
commitc42398f826da81e1edbaf1ab9d02689ba5b25613 (patch)
treeec06c3452889dfcae491039ea0b31db885678f25
parent48603cc64d20652b2a5ecf8e1e5ab19a82a47842 (diff)
ENGR00295752: watchdog: imx2_wdt: disable watchdog timer during low power mode
We should set watchdog timer to be disabled in low power mode, as there is no service running in background, otherwise, system will reset unexpected. Signed-off-by: Anson Huang <b20788@freescale.com>
-rw-r--r--drivers/watchdog/imx2_wdt.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c
index 62946c2cb4f8..e0b958062e81 100644
--- a/drivers/watchdog/imx2_wdt.c
+++ b/drivers/watchdog/imx2_wdt.c
@@ -2,6 +2,7 @@
* Watchdog driver for IMX2 and later processors
*
* Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* some parts adapted by similar drivers from Darius Augulis and Vladimir
* Zapolskiy, additional improvements by Wim Van Sebroeck.
@@ -40,6 +41,7 @@
#define IMX2_WDT_WCR_WT (0xFF << 8) /* -> Watchdog Timeout Field */
#define IMX2_WDT_WCR_WRE (1 << 3) /* -> WDOG Reset Enable */
#define IMX2_WDT_WCR_WDE (1 << 2) /* -> Watchdog Enable */
+#define IMX2_WDT_WCR_WDZST (1 << 0) /* -> Watchdog timer Suspend */
#define IMX2_WDT_WSR 0x02 /* Service Register */
#define IMX2_WDT_SEQ1 0x5555 /* -> service sequence 1 */
@@ -87,6 +89,8 @@ static inline void imx2_wdt_setup(void)
{
u16 val = __raw_readw(imx2_wdt.base + IMX2_WDT_WCR);
+ /* Suspend timer in low power mode, write once-only */
+ val |= IMX2_WDT_WCR_WDZST;
/* Strip the old watchdog Time-Out value */
val &= ~IMX2_WDT_WCR_WT;
/* Generate reset if WDOG times out */