diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2020-07-29 19:07:17 +0800 |
|---|---|---|
| committer | Shengjiu Wang <shengjiu.wang@nxp.com> | 2020-07-30 09:54:13 +0800 |
| commit | c989fbb67543bad9dfa21beae15babd3e72e2496 (patch) | |
| tree | bfc2e9d3c5bbdc7d491534e7ac2cb3244330f872 | |
| parent | e17ee871b97ab37ed885673631d4d6d4e77f6fb1 (diff) | |
MLK-24444-2: arm64: dts: imx8qxp-mek-dsp: Configure lpuart for debug
On imx8qxp-mek, the RS232 interface is used for debugging dsp firmware.
So dedicately configure lpuart in this dtb.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts index 1ed49861de3c..03fbdd76c1b8 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts @@ -15,7 +15,7 @@ dspaudio: dspaudio { compatible = "fsl,dsp-audio"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_esai0>; + pinctrl-0 = <&pinctrl_esai0 &pinctrl_lpuart2>; status = "okay"; }; @@ -80,17 +80,20 @@ <&aud_pll_div0_lpcg 0>, <&aud_pll_div1_lpcg 0>, <&acm IMX_ADMA_ACM_AUD_CLK0_SEL>, - <&acm IMX_ADMA_ACM_AUD_CLK1_SEL>; + <&acm IMX_ADMA_ACM_AUD_CLK1_SEL>, + <&uart2_lpcg 1>, <&uart2_lpcg 0>; clock-names = "esai_ipg", "esai_mclk", "asrc_ipg", "asrc_mem", - "asrck_0", "asrck_1", "asrck_2", "asrck_3"; + "asrck_0", "asrck_1", "asrck_2", "asrck_3", "uart_ipg", + "uart_per"; assigned-clocks = <&acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>, <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MISC0>, <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MISC1>, - <&esai0_lpcg 0>; + <&esai0_lpcg 0>, + <&clk IMX_SC_R_UART_2 IMX_SC_PM_CLK_PER>; audio-interface = "esai"; assigned-clock-parents = <&aud_pll_div0_lpcg 0>; - assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>; + assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>, <80000000>; fsl,dsp-firmware = "imx/dsp/hifi4.bin"; power-domains = <&pd IMX_SC_R_MU_13A>, <&pd IMX_SC_R_MU_13B>, @@ -110,7 +113,8 @@ <&pd IMX_SC_R_DMA_0_CH2>, <&pd IMX_SC_R_DMA_0_CH3>, <&pd IMX_SC_R_DMA_0_CH4>, - <&pd IMX_SC_R_DMA_0_CH5>; + <&pd IMX_SC_R_DMA_0_CH5>, + <&pd IMX_SC_R_UART_2>; }; &esai0 { @@ -136,3 +140,7 @@ <&mclkout0_lpcg 0>; assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; }; + +&lpuart2 { + status = "disabled"; +}; |