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authorMikko Perttunen <mperttunen@nvidia.com>2014-07-11 17:18:28 +0300
committerPeter De Schrijver <pdeschrijver@nvidia.com>2014-09-18 13:57:06 +0300
commitd364a77d02071355edbd5ee26c248b1ea75c653c (patch)
tree9755a2b8357bd881ec622bb0f1ee037f171eb1eb
parent9e82bf014195d6f0054982c463575cdce24292be (diff)
ARM: tegra: Add PLL_M_UD and PLL_C_UD to tegra124-car binding header
Add these clocks to the binding header so that EMC timings that have them as parent can refer to the clocks. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
-rw-r--r--include/dt-bindings/clock/tegra124-car.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h
index 8a4c5892890f..6bac637fd635 100644
--- a/include/dt-bindings/clock/tegra124-car.h
+++ b/include/dt-bindings/clock/tegra124-car.h
@@ -337,6 +337,10 @@
#define TEGRA124_CLK_DSIB_MUX 310
#define TEGRA124_CLK_SOR0_LVDS 311
#define TEGRA124_CLK_XUSB_SS_DIV2 312
-#define TEGRA124_CLK_CLK_MAX 313
+
+#define TEGRA124_CLK_PLL_M_UD 313
+#define TEGRA124_CLK_PLL_C_UD 314
+
+#define TEGRA124_CLK_CLK_MAX 315
#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */