MLK-14301: imx dts: Fix cpu regulator references

On imx_4.9.y we no longer override the cpu arm/soc/pu-supply properties
to link to pmic directly but rather rely on the regulator core
propagating a set_voltage on a bypassed regulator upwards.

This change was already performance for imx6qdl, now do it for all the
boards using ldo-bypass.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>

11 files changed, 99 insertions, 23 deletions

diff --git a/arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi b/arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi
index 485f67e698db..0dd82ea92276 100644
--- a/arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi
+++ b/arch/arm/boot/dts/imx6dqscm-qwks-rev2.dtsi
@@ -132,9 +132,14 @@
 
 };
 
-&cpu0 {
-	arm-supply = <&sw1a_reg>;
-	soc-supply = <&sw1c_reg>;
+&reg_arm {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1c_reg>;
+	regulator-allow-bypass;
 };
 
 &clks {
diff --git a/arch/arm/boot/dts/imx6qp-sabresd.dts b/arch/arm/boot/dts/imx6qp-sabresd.dts
index 689618b04ea5..49d400c674b9 100644
--- a/arch/arm/boot/dts/imx6qp-sabresd.dts
+++ b/arch/arm/boot/dts/imx6qp-sabresd.dts
@@ -92,10 +92,6 @@
 	status = "disabled";
 };
 
-&cpu0 {
-	arm-supply = <&sw2_reg>;
-};
-
 &iomuxc {
 	imx6qdl-sabresd {
 		pinctrl_usdhc2: usdhc2grp {
diff --git a/arch/arm/boot/dts/imx6sx-14x14-arm2.dts b/arch/arm/boot/dts/imx6sx-14x14-arm2.dts
index cf9809f7f4aa..addce5935cac 100644
--- a/arch/arm/boot/dts/imx6sx-14x14-arm2.dts
+++ b/arch/arm/boot/dts/imx6sx-14x14-arm2.dts
@@ -133,11 +133,19 @@
 		792000  1175000
 		396000  1175000
 	>;
-	arm-supply = <&sw1a_reg>;
-	soc-supply = <&sw1a_reg>;
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
 &ecspi4 {
 	fsl,spi-num-chipselects = <1>;
 	cs-gpios = <&gpio7 4 0>;
diff --git a/arch/arm/boot/dts/imx6sx-sdb.dts b/arch/arm/boot/dts/imx6sx-sdb.dts
index 6372f56373bf..6ce4db15755b 100644
--- a/arch/arm/boot/dts/imx6sx-sdb.dts
+++ b/arch/arm/boot/dts/imx6sx-sdb.dts
@@ -36,6 +36,16 @@
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
 &qspi2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_qspi2>;
diff --git a/arch/arm/boot/dts/imx6sxscm-evb.dts b/arch/arm/boot/dts/imx6sxscm-evb.dts
index 51c76b4c395f..a905b7105655 100644
--- a/arch/arm/boot/dts/imx6sxscm-evb.dts
+++ b/arch/arm/boot/dts/imx6sxscm-evb.dts
@@ -499,11 +499,20 @@
 		396000	1175000
 		198000	1175000
 	>;
-	arm-supply = <&sw1a_reg>;
-	soc-supply = <&sw1a_reg>;
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
+
 &qspi2 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_qspi2_1>;
diff --git a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts
index a19fd06a5677..27469350fcba 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-ddr3-arm2.dts
@@ -118,11 +118,19 @@
 		396000	1175000
 		198000	1175000
 	>;
-	arm-supply = <&sw1a_reg>;
-	soc-supply = <&sw1a_reg>;
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
 &ecspi1 {
 	fsl,spi-num-chipselects = <1>;
 	cs-gpios = <&gpio4 26 0>;
diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk-pf1550.dts b/arch/arm/boot/dts/imx6ul-14x14-evk-pf1550.dts
index 7bd356c74c94..d319f2ea551d 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-evk-pf1550.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-evk-pf1550.dts
@@ -29,11 +29,19 @@
 		396000	1175000
 		198000	1175000
 	>;
-	arm-supply = <&sw1_reg>;
-	soc-supply = <&sw1_reg>;
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1_reg>;
+	regulator-allow-bypass;
+};
+
 &gpc {
 	fsl,ldo-bypass = <1>; /* use ldo-bypass */
 };
diff --git a/arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts b/arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts
index 0ec95098afd2..bd87a0bf573e 100644
--- a/arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts
+++ b/arch/arm/boot/dts/imx6ul-14x14-lpddr2-arm2.dts
@@ -129,11 +129,19 @@
 		396000	1175000
 		198000	1175000
 	>;
-	arm-supply = <&sw1a_reg>;
-	soc-supply = <&sw1a_reg>;
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
 &fec1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_enet1>;
diff --git a/arch/arm/boot/dts/imx6ul-9x9-evk.dts b/arch/arm/boot/dts/imx6ul-9x9-evk.dts
index 8d032f186efd..e6c5c0f90f8d 100644
--- a/arch/arm/boot/dts/imx6ul-9x9-evk.dts
+++ b/arch/arm/boot/dts/imx6ul-9x9-evk.dts
@@ -172,11 +172,19 @@
 		396000	1175000
 		198000	1175000
 	>;
-	arm-supply = <&sw1c_reg>;
-	soc-supply = <&sw1c_reg>;
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1c_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1c_reg>;
+	regulator-allow-bypass;
+};
+
 &csi {
 	status = "disabled";
 
diff --git a/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts
index 0b877e287888..98b5cfa96f9e 100644
--- a/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts
+++ b/arch/arm/boot/dts/imx6ull-14x14-ddr3-arm2.dts
@@ -115,11 +115,19 @@
 		396000	1175000
 		198000	1175000
 	>;
-	arm-supply = <&sw1a_reg>;
-	soc-supply = <&sw1a_reg>;
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1a_reg>;
+	regulator-allow-bypass;
+};
+
 &csi {
 	status = "okay";
 
diff --git a/arch/arm/boot/dts/imx6ull-9x9-evk.dts b/arch/arm/boot/dts/imx6ull-9x9-evk.dts
index ab10a435f254..8e88f669379c 100644
--- a/arch/arm/boot/dts/imx6ull-9x9-evk.dts
+++ b/arch/arm/boot/dts/imx6ull-9x9-evk.dts
@@ -172,11 +172,19 @@
 		396000	1175000
 		198000	1175000
 	>;
-	arm-supply = <&sw1c_reg>;
-	soc-supply = <&sw1c_reg>;
 	fsl,arm-soc-shared = <1>;
 };
 
+&reg_arm {
+	vin-supply = <&sw1c_reg>;
+	regulator-allow-bypass;
+};
+
+&reg_soc {
+	vin-supply = <&sw1c_reg>;
+	regulator-allow-bypass;
+};
+
 &csi {
 	status = "okay";