diff options
| author | Daehyoung Ko <dko@nvidia.com> | 2011-09-30 17:42:49 -0700 |
|---|---|---|
| committer | Cheryl Jones <chjones@nvidia.com> | 2011-10-06 17:16:29 -0700 |
| commit | e03fe4cc1bf06fa6c32c0520e2ba31f009f9301d (patch) | |
| tree | 791de9852b7d95ef25cece34524d9212f03bd1fc | |
| parent | f6fccb0136915ceaad4306671931dda33b6fab2e (diff) | |
ARM tegra: gpio: Correct gpio interrupt init sequence
It is possible for GPIO interrupt to occur when registering handler
since set_irq_chained_handler enables GPIO interrupt. Thus
all relevant variables are required to be initialized
before calling set_irq_chained_handler.
Also add initialization of interrupt status register.
Bug 884569
Change-Id: I596dfab3eb8b29722a05f06ec8c026a7b2f400b6
Reviewed-on: http://git-master/r/55612
Reviewed-by: Daehyoung Ko <dko@nvidia.com>
Tested-by: Daehyoung Ko <dko@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/gpio.c | 8 | ||||
| -rw-r--r-- | arch/arm/mach-tegra/legacy_irq.c | 1 |
2 files changed, 6 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c index 0187aaa61cd9..76bc003e24fe 100644 --- a/arch/arm/mach-tegra/gpio.c +++ b/arch/arm/mach-tegra/gpio.c @@ -363,6 +363,7 @@ static int __init tegra_gpio_init(void) for (j = 0; j < 4; j++) { int gpio = tegra_gpio_compose(i, j, 0); __raw_writel(0x00, GPIO_INT_ENB(gpio)); + __raw_writel(0x00, GPIO_INT_STA(gpio)); } } @@ -381,11 +382,12 @@ static int __init tegra_gpio_init(void) for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) { bank = &tegra_gpio_banks[i]; - set_irq_chained_handler(bank->irq, tegra_gpio_irq_handler); - set_irq_data(bank->irq, bank); - for (j = 0; j < 4; j++) spin_lock_init(&bank->lvl_lock[j]); + + set_irq_data(bank->irq, bank); + set_irq_chained_handler(bank->irq, tegra_gpio_irq_handler); + } return 0; diff --git a/arch/arm/mach-tegra/legacy_irq.c b/arch/arm/mach-tegra/legacy_irq.c index a768f3e8d45b..f30e6c2f40b1 100644 --- a/arch/arm/mach-tegra/legacy_irq.c +++ b/arch/arm/mach-tegra/legacy_irq.c @@ -171,6 +171,7 @@ void tegra_init_legacy_irq(void) void __iomem *ictlr = ictlr_reg_base[i]; writel(~0, ictlr + ICTLR_CPU_IER_CLR); writel(0, ictlr + ICTLR_CPU_IEP_CLASS); + writel(~0, ictlr + ICTLR_CPU_IEP_FIR_CLR); } } |