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authorShengjiu Wang <shengjiu.wang@nxp.com>2020-03-26 13:13:32 +0800
committerShengjiu Wang <shengjiu.wang@nxp.com>2020-03-27 16:04:34 +0800
commite053e4917f03dd742e5f6e8db918a1851c3120b0 (patch)
tree7696e316850df4140df6d730dae606708ea38dfe
parentf1e4bfdabb26e4a14aa1ddd5d9360c15e9eba576 (diff)
MLK-23680-1: clk: imx: clk-audiomix: remove sdma root clock
There is hardware issue: TKT0535653 SDMA3 can't work without setting AUDIOMIX_CLKEN0[SDMA2] (bit-26) to 1 The workaround is: As the reset state of AUDIOMIX_CLKEN0[SDMA2] is enabled, we just need to keep it on as reset state, don't touch it in kernel, then every thing is same as before, if we register the clock in clk-audiomix, then kernel will try to disable it in idle. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
-rw-r--r--drivers/clk/imx/clk-audiomix.c9
-rw-r--r--include/dt-bindings/clock/imx8mp-clock.h1
2 files changed, 7 insertions, 3 deletions
diff --git a/drivers/clk/imx/clk-audiomix.c b/drivers/clk/imx/clk-audiomix.c
index be5ca622af95..13e0f85e8d7f 100644
--- a/drivers/clk/imx/clk-audiomix.c
+++ b/drivers/clk/imx/clk-audiomix.c
@@ -83,7 +83,13 @@ static int imx_audiomix_clk_resume(struct device *dev)
pm_runtime_get(dev);
clk_prepare_enable(clk_audio_root);
- writel(audiomix_clk_saved_regs[0], base);
+ /*
+ * Ignore bit26, which are clock gate for sdma clock root.
+ * We need to keep it on as reset state for hardware issue
+ * that sdma3' event logic depends on sdma2's clock gate.
+ * keep it enabled can workaround the issue.
+ */
+ writel(audiomix_clk_saved_regs[0] | 0x4000000, base);
writel(audiomix_clk_saved_regs[1], base + 0x4);
writel(audiomix_clk_saved_regs[2], base + 0x300);
@@ -168,7 +174,6 @@ static int imx_audiomix_clk_probe(struct platform_device *pdev)
clks[IMX8MP_CLK_AUDIOMIX_PDM_IPG] = imx_dev_clk_gate_shared(dev, "pdm_ipg_clk", "ipg_audio_root", base, 25, &shared_count_pdm);
clks[IMX8MP_CLK_AUDIOMIX_PDM_ROOT] = imx_dev_clk_gate_shared(dev, "pdm_root_clk", "pdm", base, 25, &shared_count_pdm);
- clks[IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT] = imx_dev_clk_gate(dev, "sdma2_root_clk", "ipg_audio_root", base, 26);
clks[IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT] = imx_dev_clk_gate(dev, "sdma3_root_clk", "ipg_audio_root", base, 27);
clks[IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT] = imx_dev_clk_gate(dev, "spba2_root_clk", "ipg_audio_root", base, 28);
clks[IMX8MP_CLK_AUDIOMIX_DSP_ROOT] = imx_dev_clk_gate(dev, "dsp_root_clk", "ipg_audio_root", base, 29);
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h
index 29e9775dd03c..817916007b39 100644
--- a/include/dt-bindings/clock/imx8mp-clock.h
+++ b/include/dt-bindings/clock/imx8mp-clock.h
@@ -328,7 +328,6 @@
#define IMX8MP_CLK_AUDIOMIX_SAI7_MCLK3 23
#define IMX8MP_CLK_AUDIOMIX_ASRC_IPG 24
#define IMX8MP_CLK_AUDIOMIX_PDM_IPG 25
-#define IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT 26
#define IMX8MP_CLK_AUDIOMIX_SDMA3_ROOT 27
#define IMX8MP_CLK_AUDIOMIX_SPBA2_ROOT 28
#define IMX8MP_CLK_AUDIOMIX_DSP_ROOT 29