diff options
| author | Silvano di Ninno <silvano.dininno@nxp.com> | 2018-05-17 18:44:03 +0200 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:32:47 +0800 |
| commit | e96f0fc2a358b525cb56184af8e1d0e0dc7a185a (patch) | |
| tree | ac254893dd74afd8dded290da7454209ab8e4eb1 | |
| parent | 7f6b3d1dd54199cb15464de2b681644ccffadbe7 (diff) | |
MLK-18345: drivers: caam: add support for i.mx8mm
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Franck Lenormand <franck.lenormand@nxp.com>
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi | 44 | ||||
| -rw-r--r-- | drivers/crypto/caam/ctrl.c | 9 | ||||
| -rw-r--r-- | drivers/crypto/caam/jr.c | 3 |
3 files changed, 51 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi index b0162f68eb03..fc1d3ae37337 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi @@ -1126,6 +1126,7 @@ power-domains = <&vpu_g2_pd>; status = "disabled"; }; + gpu: gpu@38000000 { compatible ="fsl,imx6q-gpu"; reg = <0x0 0x38000000 0x0 0x8000>, <0x0 0x38008000 0x0 0x8000>, @@ -1154,7 +1155,48 @@ power-domains = <&gpu_mix_pd>; status = "disabled"; - }; + }; + + crypto: caam@30900000 { + compatible = "fsl,sec-v4.0"; + #address-cells = <0x1>; + #size-cells = <0x1>; + reg = <0 0x30900000 0 0x40000>; + ranges = <0 0 0x30900000 0x40000>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + + sec_jr0: jr0@1000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x1000 0x1000>; + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr1: jr1@2000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x2000 0x1000>; + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + }; + + sec_jr2: jr2@3000 { + compatible = "fsl,sec-v4.0-job-ring"; + reg = <0x3000 0x1000>; + interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + caam_sm: caam-sm@00100000 { + compatible = "fsl,imx6q-caam-sm"; + reg = <0 0x00100000 0 0x7fff>; + }; + + irq_sec_vio: caam_secvio { + compatible = "fsl,imx7d-caam-secvio", "fsl,imx6q-caam-secvio"; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + jtag-tamper = "disabled"; + watchdog-tamper = "enabled"; + internal-boot-tamper = "enabled"; + external-pin-tamper = "disabled"; + }; }; &A53_0 { diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index ebf17a16870c..4cdd339d0066 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -324,7 +324,8 @@ static int caam_probe(struct platform_device *pdev) caam_imx = (bool)soc_device_match(imx_soc); - if (!of_machine_is_compatible("fsl,imx8mq") && + if (!of_machine_is_compatible("fsl,imx8mm") && + !of_machine_is_compatible("fsl,imx8mq") && !of_machine_is_compatible("fsl,imx8qm") && !of_machine_is_compatible("fsl,imx8qxp")) { ret = init_clocks(ctrlpriv); @@ -397,7 +398,8 @@ static int caam_probe(struct platform_device *pdev) goto disable_clocks; } - if (!of_machine_is_compatible("fsl,imx8mq") && + if (!of_machine_is_compatible("fsl,imx8mm") && + !of_machine_is_compatible("fsl,imx8mq") && !of_machine_is_compatible("fsl,imx8qm") && !of_machine_is_compatible("fsl,imx8qxp")) { ctrlpriv->sm_size = resource_size(&res_regs); @@ -467,7 +469,8 @@ caam_remove: iounmap_ctrl: iounmap(ctrl); disable_clocks: - if (!of_machine_is_compatible("fsl,imx8mq") && + if (!of_machine_is_compatible("fsl,imx8mm") && + !of_machine_is_compatible("fsl,imx8mq") && !of_machine_is_compatible("fsl,imx8qm") && !of_machine_is_compatible("fsl,imx8qxp")) { clk_disable_unprepare(ctrlpriv->caam_emi_slow); diff --git a/drivers/crypto/caam/jr.c b/drivers/crypto/caam/jr.c index 8662e6062956..847d91a5ca7e 100644 --- a/drivers/crypto/caam/jr.c +++ b/drivers/crypto/caam/jr.c @@ -511,7 +511,8 @@ static int caam_jr_probe(struct platform_device *pdev) jrpriv->rregs = (struct caam_job_ring __iomem __force *)ctrl; - if (of_machine_is_compatible("fsl,imx8qm") || + if (of_machine_is_compatible("fsl,imx8mm") || + of_machine_is_compatible("fsl,imx8qm") || of_machine_is_compatible("fsl,imx8qxp") || of_machine_is_compatible("fsl,imx8mq")) { error = dma_set_mask_and_coherent(jrdev, DMA_BIT_MASK(32)); |