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authorPaul Burton <paul.burton@imgtec.com>2016-10-05 18:18:09 +0100
committerRalf Baechle <ralf@linux-mips.org>2016-10-06 17:57:41 +0200
commitf474ba9d9f275fc3bfe459b48bfc17ddd8e1f4cb (patch)
tree78b685f015fc1c9c73f61ef45a7a583e01d7714d
parent88555b481958083b1b928a4ba5c6e3bc606ce34b (diff)
MIPS: PCI: Make pcibios_set_cache_line_size an initcall
In preparation for allowing configurations in which pcibios_init is not included, make pcibios_set_cache_line_size an initcall. arch_initcall is used such that it runs before the pcibios_init subsys_initcall for platforms that continue to use it. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14342/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/pci/pci.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 5207c043c69c..30320a4c8909 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -220,7 +220,7 @@ out:
"Skipping PCI bus scan due to resource conflict\n");
}
-static void __init pcibios_set_cache_line_size(void)
+static int __init pcibios_set_cache_line_size(void)
{
struct cpuinfo_mips *c = &current_cpu_data;
unsigned int lsize;
@@ -238,14 +238,14 @@ static void __init pcibios_set_cache_line_size(void)
pci_dfl_cache_line_size = lsize >> 2;
pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
+ return 0;
}
+arch_initcall(pcibios_set_cache_line_size);
static int __init pcibios_init(void)
{
struct pci_controller *hose;
- pcibios_set_cache_line_size();
-
/* Scan all of the recorded PCI controllers. */
list_for_each_entry(hose, &controllers, list)
pcibios_scanbus(hose);