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authorHiroshi Doyu <hdoyu@nvidia.com>2013-12-10 13:26:13 +0200
committerKrishna Reddy <vdumpa@nvidia.com>2013-12-12 11:56:36 -0800
commitf54adfcd6d821afe8dcddd1dc02877d3bf2730cf (patch)
tree1c819b2321137474ae95646b48844df0a05d5092
parentfafea7ef5ff8a48c753498fee8ea383e7b736662 (diff)
crypto: tegra-se: avoid ctx save buf from highmem
DMA API(IOMMU) can allocate pages from highmem since IOMMU usually voids the limitation of accesible page range from HWA. But there's some special case that a client wants pages accessible within 32bit explicitly, especially for some PM suspend/resume case here. This patch gives a hint to DMA API where to allocate pages. Bug 1414172 Change-Id: I4f457264724d92e2d9fba7993c2c62c165fe2010 Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/343646 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
-rw-r--r--drivers/crypto/tegra-se.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/crypto/tegra-se.c b/drivers/crypto/tegra-se.c
index bbd011e124d8..196450f4dcc8 100644
--- a/drivers/crypto/tegra-se.c
+++ b/drivers/crypto/tegra-se.c
@@ -2694,11 +2694,11 @@ static int tegra_se_probe(struct platform_device *pdev)
if (!se_dev->chipdata->drbg_supported)
se_dev->ctx_save_buf = dma_alloc_coherent(se_dev->dev,
SE_CONTEXT_BUFER_SIZE, &se_dev->ctx_save_buf_adr,
- GFP_KERNEL);
+ GFP_DMA32);
else
se_dev->ctx_save_buf = dma_alloc_coherent(se_dev->dev,
SE_CONTEXT_DRBG_BUFER_SIZE,
- &se_dev->ctx_save_buf_adr, GFP_KERNEL);
+ &se_dev->ctx_save_buf_adr, GFP_DMA32);
if (!se_dev->ctx_save_buf) {
dev_err(se_dev->dev, "Context save buffer alloc filed\n");