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| author | Sanjay Singh Rawat <srawat@nvidia.com> | 2011-09-22 20:00:47 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-09-29 18:14:17 -0700 |
| commit | b8cd0a4bc63f8e8f3f44dfb82fc16f5eca858616 (patch) | |
| tree | eee04f416174e93a5cfc47e3bcb80fe2eed6a321 /CREDITS | |
| parent | bb047c7138544c3a94bc8a83ece2ea802149e69e (diff) | |
video: tegra: Do correct pixel clock validation of HDMI sink
Resolution wise the pixel clock of the peripheral and supported resolution
mode if found different was checked whether in permissible range or not.
PICOS2KHZ macro argument is taken as denominator in division, in multiple
argument case care should be taken.
Bug 878912
Similar Bug 872389
Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-on: http://git-master/r/54050
(cherry picked from commit 927b647e437133a9d28336ed697447e41b09b9c7)
Change-Id: I6056cbb01d6eea9c1f01168e55d78356ed00108a
Reviewed-on: http://git-master/r/55142
Tested-by: Sanjay Singh Rawat <srawat@nvidia.com>
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'CREDITS')
0 files changed, 0 insertions, 0 deletions