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author | Borislav Petkov <borislav.petkov@amd.com> | 2009-10-21 13:44:36 +0200 |
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committer | Borislav Petkov <borislav.petkov@amd.com> | 2009-12-07 19:14:29 +0100 |
commit | 1433eb9903408d1801d19a9c49893120874abc12 (patch) | |
tree | a765ae5d98e7576fa005fc980bb4bd6ebd2f5075 /Documentation/DMA-ISA-LPC.txt | |
parent | d16149e8c378ab7011e600980af51d2477aa5307 (diff) |
amd64_edac: enhance address to DRAM bank mapping
Add cs mode to cs size mapping tables for DDR2 and DDR3 and F10
and all K8 flavors and remove klugdy table of pseudo values. Add a
low_ops->dbam_to_cs member which is family-specific and replaces
low_ops->dbam_map_to_pages since the pages calculation is a one liner
now.
Further cleanups, while at it:
- shorten family name defines
- align amd64_family_types struct members
Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
Diffstat (limited to 'Documentation/DMA-ISA-LPC.txt')
0 files changed, 0 insertions, 0 deletions