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authorVarun Wadekar <vwadekar@nvidia.com>2011-07-27 11:53:12 +0530
committerSimone Willett <swillett@nvidia.com>2011-08-09 13:22:29 -0700
commit0ee38bb7f7b6720b6c0627a9cf8c334678066d8d (patch)
tree796e04556cd4abb80cf06b214d5ecf6cddf122b3 /Documentation/DMA-ISA-LPC.txt
parenta714dd55c49e16173f7cff264ac58b5cbd6c0942 (diff)
ARM: tegra: ventana: nvidia memory table updates to prevent corruption
To avoid memory corruption when device is operating at full temperature QUSE_EXTRA should always be set to 0 for frequencies 150MHz and less. As extra protection change FBIO_CFG5 to remove the region where there is TriState on the DQS signals thus preventing false DQS pulses (and false reads). (cherry-picked from 2dc075be0e8495654a84a6bc6afa63408e141b02) Original author: James Wylder <james.wylder@motorola.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I5c711343737edf972251006484ea84661106e0f9 Reviewed-on: http://git-master/r/43401 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
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