diff options
| author | Matt LaPlante <kernel1@cyberdogtech.com> | 2007-10-20 01:34:40 +0200 |
|---|---|---|
| committer | Adrian Bunk <bunk@kernel.org> | 2007-10-20 01:34:40 +0200 |
| commit | 01dd2fbf0da4019c380b6ca22a074538fb31db5a (patch) | |
| tree | 210291bd341c4450c8c51d8db890af0978f4035d /Documentation/arm | |
| parent | 0f035b8e8491f4ff87f6eec3e3f754d36b39d7a2 (diff) | |
typo fixes
Most of these fixes were already submitted for old kernel versions, and were
approved, but for some reason they never made it into the releases.
Because this is a consolidation of a couple old missed patches, it touches both
Kconfigs and documentation texts.
Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Adrian Bunk <bunk@kernel.org>
Diffstat (limited to 'Documentation/arm')
| -rw-r--r-- | Documentation/arm/Samsung-S3C24XX/DMA.txt | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/DMA.txt b/Documentation/arm/Samsung-S3C24XX/DMA.txt index 37f4edcc5d87..3ed82383efea 100644 --- a/Documentation/arm/Samsung-S3C24XX/DMA.txt +++ b/Documentation/arm/Samsung-S3C24XX/DMA.txt @@ -5,7 +5,7 @@ Introduction ------------ The kernel provides an interface to manage DMA transfers - using the DMA channels in the cpu, so that the central + using the DMA channels in the CPU, so that the central duty of managing channel mappings, and programming the channel generators is in one place. @@ -17,24 +17,24 @@ DMA Channel Ordering channels to all sources, which means that some devices have a restricted number of channels that can be used. - To allow flexibilty for each cpu type and board, the - dma code can be given an dma ordering structure which + To allow flexibility for each CPU type and board, the + DMA code can be given a DMA ordering structure which allows the order of channel search to be specified, as well as allowing the prohibition of certain claims. struct s3c24xx_dma_order has a list of channels, and - each channel within has a slot for a list of dma - channel numbers. The slots are searched in order, for - the presence of a dma channel number with DMA_CH_VALID - orred in. + each channel within has a slot for a list of DMA + channel numbers. The slots are searched in order for + the presence of a DMA channel number with DMA_CH_VALID + or-ed in. If the order has the flag DMA_CH_NEVER set, then after checking the channel list, the system will return no found channel, thus denying the request. A board support file can call s3c24xx_dma_order_set() - to register an complete ordering set. The routine will - copy the data, so the original can be discared with + to register a complete ordering set. The routine will + copy the data, so the original can be discarded with __initdata. |