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| author | Robin Gong <B38343@freescale.com> | 2012-09-03 15:17:01 +0800 |
|---|---|---|
| committer | Robin Gong <B38343@freescale.com> | 2012-09-03 17:47:32 +0800 |
| commit | d97b871cc396738ff62293df6b4ba78ade44b6d2 (patch) | |
| tree | 6f6dfab67054d62ce66dc849911ba9aa7b531669 /Documentation/devices.txt | |
| parent | f96b367fdd4b1db2c01e6aa59a825c5e6873efa4 (diff) | |
ENGR00222855 MX6 CPUFREQ: support three VDDSOC setpointsrel_imx_3.0.35_12.09.02
On MX6Q/DL , there is only two set point of VDDSOC/VDDPU, one is 1.25V(1GHz),
another is 1.175V. And in arch/arm/plat-mxc/cpufreq.c will judge whether the
current cpu frequency is the highest set point(1G) or not to set the right
VDDSOC/VDDPU. The logic is also match to dynamic ldo bypass function, since the
change point is the highest set point too. But there is three set points of
VDDSOC/VDDPU in MX6SL , so the logic in cpufreq.c need to change. Now
VDDSOC/VDDPU will track with VDDARM fully.
Signed-off-by: Robin Gong <B38343@freescale.com>
Diffstat (limited to 'Documentation/devices.txt')
0 files changed, 0 insertions, 0 deletions