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authorAlexandre Belloni <alexandre.belloni@free-electrons.com>2014-07-08 18:21:11 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-07-15 11:43:14 +0200
commit017b5522d5e31a0b2c2f54f566aa8887838bccc7 (patch)
treec658d7c62419ec63efa43f3b736a2c4037e5d5b7 /Documentation/devicetree/bindings/arm/atmel-at91.txt
parent7171511eaec5bf23fb06078f59784a3a0626b38f (diff)
ARM: at91: Add new binding for sama5d3-ddramc
The IP for the SDRAM controller found on sama5d3 SoCs is different from the g45 one. Introduce a new compatible string to reflect that. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/atmel-at91.txt')
-rw-r--r--Documentation/devicetree/bindings/arm/atmel-at91.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.txt b/Documentation/devicetree/bindings/arm/atmel-at91.txt
index 16f60b41c147..33bcf8b57798 100644
--- a/Documentation/devicetree/bindings/arm/atmel-at91.txt
+++ b/Documentation/devicetree/bindings/arm/atmel-at91.txt
@@ -61,6 +61,7 @@ RAMC SDRAM/DDR Controller required properties:
- compatible: Should be "atmel,at91rm9200-sdramc",
"atmel,at91sam9260-sdramc",
"atmel,at91sam9g45-ddramc",
+ "atmel,sama5d3-ddramc",
- reg: Should contain registers location and length
For at91sam9263 and at91sam9g45 you must specify 2 entries.