diff options
author | Vabhav Sharma <vabhav.sharma@nxp.com> | 2018-08-06 16:09:08 +0530 |
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committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:37 +0800 |
commit | b5eef889ef7ba362e2f01ee5cd19fac703e1a557 (patch) | |
tree | 304ea6e8f834aa3c367fa0eb857a416abbce4683 /Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt | |
parent | 567bc3e2ef5ad28f5aea61af96c40f734019e604 (diff) |
dt-bindings: arm64: add compatible for LX2160A
Add compatible for LX2160A SoC,QDS and RDB board
Add lx2160a compatible for clockgen and dcfg
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt')
-rw-r--r-- | Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt index b5cb374dc47d..10a91cc8b997 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt @@ -8,7 +8,7 @@ Required properties: - compatible: Should contain a chip-specific compatible string, Chip-specific strings are of the form "fsl,<chip>-dcfg", The following <chip>s are known to be supported: - ls1012a, ls1021a, ls1043a, ls1046a, ls2080a. + ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a - reg : should contain base address and length of DCFG memory-mapped registers |