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authorWang Long <long.wanglong@huawei.com>2014-12-24 03:09:58 +0000
committerOlof Johansson <olof@lixom.net>2015-01-21 14:35:06 -0800
commit56a9c909d88ab3f66e14c5d21727b8e388a8ec90 (patch)
tree3c73ef9d5f1549ec0f8a8dcd1edec0c37823a768 /Documentation/devicetree/bindings/arm/hisilicon
parentb5c3d7d3af9444130038ba29892e9bcf3c59ec10 (diff)
ARM: dts: Add hip01-ca9x2 dts file
Add dts file for Hisilicon hip01 ca9x2 board Signed-off-by: Wang Long <long.wanglong@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> [olof: Folded in smp enable-method from a different patch] Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/hisilicon')
-rw-r--r--Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt25
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index f717c7b48603..35b1bd49cfa1 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -9,6 +9,10 @@ HiP04 D01 Board
Required root node properties:
- compatible = "hisilicon,hip04-d01";
+HiP01 ca9x2 Board
+Required root node properties:
+ - compatible = "hisilicon,hip01-ca9x2";
+
Hisilicon system controller
@@ -37,6 +41,27 @@ Example:
};
-----------------------------------------------------------------------
+Hisilicon HiP01 system controller
+
+Required properties:
+- compatible : "hisilicon,hip01-sysctrl"
+- reg : Register address and size
+
+The HiP01 system controller is mostly compatible with hisilicon
+system controller,but it has some specific control registers for
+HIP01 SoC family, such as slave core boot, and also some same
+registers located at different offset.
+
+Example:
+
+ /* for hip01-ca9x2 */
+ sysctrl: system-controller@10000000 {
+ compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
+ reg = <0x10000000 0x1000>;
+ reboot-offset = <0x4>;
+ };
+
+-----------------------------------------------------------------------
Hisilicon CPU controller
Required properties: