diff options
author | Antoine Tenart <antoine.tenart@free-electrons.com> | 2015-04-27 21:39:48 +0200 |
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committer | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-05-16 00:07:23 +0200 |
commit | 7c90a5a9af6f02e04980958ef3f8d5f254364cca (patch) | |
tree | 94ac663670e2d7d94ed1f22e61351436080e03df /Documentation/devicetree/bindings/arm/marvell,berlin.txt | |
parent | f07b4e49d27e8c085f0021093a612034bc0c75c6 (diff) |
Documentation: bindings: update the Berlin controllers documentation
We're moving from a single node for multiple devices to a node with one
sub-node per sub-device, registered by simple-mfd. Update the
documentation to reflect the changes.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/marvell,berlin.txt')
-rw-r--r-- | Documentation/devicetree/bindings/arm/marvell,berlin.txt | 26 |
1 files changed, 16 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/arm/marvell,berlin.txt b/Documentation/devicetree/bindings/arm/marvell,berlin.txt index 060daafc14ff..1f05794ecf74 100644 --- a/Documentation/devicetree/bindings/arm/marvell,berlin.txt +++ b/Documentation/devicetree/bindings/arm/marvell,berlin.txt @@ -61,10 +61,13 @@ chip control registers, so there should be a single DT node only providing the different functions which are described below. Required properties: -- compatible: shall be one of - "marvell,berlin2-chip-ctrl" for BG2 - "marvell,berlin2cd-chip-ctrl" for BG2CD - "marvell,berlin2q-chip-ctrl" for BG2Q +- compatible: + * the first value should be one of: + "marvell,berlin2-chip-ctrl" for BG2 + "marvell,berlin2cd-chip-ctrl" for BG2CD + "marvell,berlin2q-chip-ctrl" for BG2Q + * the second and third values must be: + "simple-mfd", "syscon" - reg: address and length of following register sets for BG2/BG2CD: chip control register set BG2Q: chip control register set and cpu pll registers @@ -75,10 +78,13 @@ Marvell Berlin SoCs have a system control register set providing several individual registers dealing with pinmux, padmux, and reset. Required properties: -- compatible: should be one of - "marvell,berlin2-system-ctrl" for BG2 - "marvell,berlin2cd-system-ctrl" for BG2CD - "marvell,berlin2q-system-ctrl" for BG2Q +- compatible: + * the first value should be one of: + "marvell,berlin2-system-ctrl" for BG2 + "marvell,berlin2cd-system-ctrl" for BG2CD + "marvell,berlin2q-system-ctrl" for BG2Q + * the second and third values must be: + "simple-mfd", "syscon" - reg: address and length of the system control register set * Clock provider binding @@ -130,7 +136,7 @@ Required property: Example: chip: chip-control@ea0000 { - compatible = "marvell,berlin2-chip-ctrl"; + compatible = "marvell,berlin2-chip-ctrl", "simple-mfd", "syscon"; #clock-cells = <1>; #reset-cells = <2>; reg = <0xea0000 0x400>; @@ -144,7 +150,7 @@ chip: chip-control@ea0000 { }; sysctrl: system-controller@d000 { - compatible = "marvell,berlin2-system-ctrl"; + compatible = "marvell,berlin2-system-ctrl", "simple-mfd", "syscon"; reg = <0xd000 0x100>; uart0_pmux: uart0-pmux { |