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authorBenoit Cousson <b-cousson@ti.com>2011-11-30 19:21:07 +0100
committerBenoit Cousson <b-cousson@ti.com>2012-02-27 10:33:18 +0100
commit52fa212088b141dd05957dc4b7f06a893c8166ad (patch)
tree9a9c1e90a6acce6dd8ea965e41a7fca79e459b84 /Documentation/devicetree/bindings/arm/omap
parent1f52299ec000e2161635b263d81ab92ea7f1f0a7 (diff)
ARM: OMAP2/3: intc: Add DT support for TI interrupt controller
Add a function to initialize the OMAP2/3 interrupt controller (INTC) using a device tree node. This version take advantage of the new irq_domain_add_legacy API. Replace some printk() with the proper pr_ macro. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/omap')
-rw-r--r--Documentation/devicetree/bindings/arm/omap/intc.txt27
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/omap/intc.txt b/Documentation/devicetree/bindings/arm/omap/intc.txt
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+* OMAP Interrupt Controller
+
+OMAP2/3 are using a TI interrupt controller that can support several
+configurable number of interrupts.
+
+Main node required properties:
+
+- compatible : should be:
+ "ti,omap2-intc"
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+ interrupt source. The type shall be a <u32> and the value shall be 1.
+
+ The cell contains the interrupt number in the range [0-128].
+- ti,intc-size: Number of interrupts handled by the interrupt controller.
+- reg: physical base address and size of the intc registers map.
+
+Example:
+
+ intc: interrupt-controller@1 {
+ compatible = "ti,omap2-intc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ ti,intc-size = <96>;
+ reg = <0x48200000 0x1000>;
+ };
+