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authorLinus Walleij <linus.walleij@linaro.org>2013-10-04 15:15:35 +0200
committerLinus Walleij <linus.walleij@linaro.org>2014-01-03 22:26:13 +0100
commitbdd272cbb97a66cf83061d22cfd19beb7267943a (patch)
treeb43334bc0f1b3f76404c4841088a25bc44cd1d28 /Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
parentfe989145447341bff1ed68bd8aaee12ea860d461 (diff)
irqchip: versatile FPGA: support cascaded interrupts from DT
The Versatile FPGA interrupt controller supports cascading interrupts, i.e. that its output is connected to the input of another interrupt controller. This makes it possible to pass a parent interrupt from the device tree and print it in the boot log if applicable. Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt')
-rw-r--r--Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt5
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt b/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
index 9989eda755d9..c9cf605bb995 100644
--- a/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
+++ b/Documentation/devicetree/bindings/arm/versatile-fpga-irq.txt
@@ -29,3 +29,8 @@ pic: pic@14000000 {
clear-mask = <0xffffffff>;
valid-mask = <0x003fffff>;
};
+
+Optional properties:
+- interrupts: if the FPGA IRQ controller is cascaded, i.e. if its IRQ
+ output is simply connected to the input of another IRQ controller,
+ then the parent IRQ shall be specified in this property.