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| author | Florian Fainelli <f.fainelli@gmail.com> | 2020-04-17 17:11:46 -0700 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2020-09-06 20:10:38 -0700 |
| commit | 541b6e6ee7a475538c5d6b0b6ad74752d10e3064 (patch) | |
| tree | c0bb09da2489b79baedcdae617eda30287f0d76d /Documentation/devicetree/bindings/bus | |
| parent | 10e7dd54cdaa00be8deb11a8cdb90faa804bdb19 (diff) | |
dt-bindings: bus: Document breakpoint interrupt for gisb-arb
The GISB arbiter can have a third and optional interrupt to handle GISB
breakpoints.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'Documentation/devicetree/bindings/bus')
| -rw-r--r-- | Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt index 729def62f0c5..10f6d0a8159d 100644 --- a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt +++ b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt @@ -10,7 +10,8 @@ Required properties: "brcm,bcm7038-gisb-arb" for 130nm chips - reg: specifies the base physical address and size of the registers - interrupts: specifies the two interrupts (timeout and TEA) to be used from - the parent interrupt controller + the parent interrupt controller. A third optional interrupt may be specified + for breakpoints. Optional properties: |