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authorJacky Bai <ping.bai@nxp.com>2021-06-04 09:05:44 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2021-11-02 16:35:23 +0800
commitfd9c2bbf684bf27d6860e866ead694513526a8ec (patch)
tree13b11ea58e0950feb2c1ea22be41cb204276c25d /Documentation/devicetree/bindings/clock/imx8ulp-clock.yaml
parent6e260d9aaea5ec3ddac41c3c878e4a019f35481b (diff)
MLK-25558-02 dt-bindings: clock: imx8ulp-clock: Add the #reset-cells property
for pcc node, it will also be used as a reset controller, so add the '#reset-cells' property description and add the pcc reset IDs. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/imx8ulp-clock.yaml')
-rw-r--r--Documentation/devicetree/bindings/clock/imx8ulp-clock.yaml21
1 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx8ulp-clock.yaml b/Documentation/devicetree/bindings/clock/imx8ulp-clock.yaml
index d840ccff413e..3396b6f7064c 100644
--- a/Documentation/devicetree/bindings/clock/imx8ulp-clock.yaml
+++ b/Documentation/devicetree/bindings/clock/imx8ulp-clock.yaml
@@ -46,11 +46,31 @@ properties:
ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8ulp-clock.h
for the full list of i.MX8ULP clock IDs.
+ '#reset-cells':
+ const: 1
+ description:
+ The reset consumer should specify the desired clock by having the reset
+ ID in its "resets" phandle cell. See include/dt-bindings/reset/imx8ulp-pcc-reset.h
+ for the full list of i.MX8ULP reset IDs. Only PCC3, PCC4 and PCC5 should specify
+ this property.
+
required:
- compatible
- reg
- '#clock-cells'
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,imx8ulp-pcc3
+ - fsl,imx8ulp-pcc4
+ - fsl,imx8ulp-pcc5
+then:
+ required:
+ - '#reset-cells'
+
additionalProperties: false
examples:
@@ -69,4 +89,5 @@ examples:
compatible = "fsl,imx8ulp-pcc3";
reg = <0x292d0000 0x10000>;
#clock-cells = <1>;
+ #reset-cells = <1>;
};