summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/clock/sunxi.txt
diff options
context:
space:
mode:
authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-07-16 11:21:59 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-08-26 10:46:32 +0200
commit2371dd88b80fc847a451d5eff018e165501f560a (patch)
treeb2c0c45cee37bbd2518f23a3dfb9d41c91ada6a2 /Documentation/devicetree/bindings/clock/sunxi.txt
parentbddbd13453d838a30baf84869c56076c8ce2b211 (diff)
clk: sunxi: Add A10s gates
The Allwinner A10s has a slightly different gates set than the A10 and A13, so add these gates to the clk driver. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar> Reviewed-by: Emilio López <emilio@elopez.com.ar>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/sunxi.txt')
-rw-r--r--Documentation/devicetree/bindings/clock/sunxi.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index d495521a79d2..b24de1003947 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -14,13 +14,16 @@ Required properties:
"allwinner,sun4i-ahb-clk" - for the AHB clock
"allwinner,sun4i-ahb-gates-clk" - for the AHB gates on A10
"allwinner,sun5i-a13-ahb-gates-clk" - for the AHB gates on A13
+ "allwinner,sun5i-a10s-ahb-gates-clk" - for the AHB gates on A10s
"allwinner,sun4i-apb0-clk" - for the APB0 clock
"allwinner,sun4i-apb0-gates-clk" - for the APB0 gates on A10
"allwinner,sun5i-a13-apb0-gates-clk" - for the APB0 gates on A13
+ "allwinner,sun5i-a10s-apb0-gates-clk" - for the APB0 gates on A10s
"allwinner,sun4i-apb1-clk" - for the APB1 clock
"allwinner,sun4i-apb1-mux-clk" - for the APB1 clock muxing
"allwinner,sun4i-apb1-gates-clk" - for the APB1 gates on A10
"allwinner,sun5i-a13-apb1-gates-clk" - for the APB1 gates on A13
+ "allwinner,sun5i-a10s-apb1-gates-clk" - for the APB1 gates on A10s
Required properties for all clocks:
- reg : shall be the control register address for the clock.