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authorMarc Gonzalez <marc_gonzalez@sigmadesigns.com>2015-10-30 13:25:28 +0100
committerStephen Boyd <sboyd@codeaurora.org>2015-11-16 11:07:06 -0800
commited12dfc92f01690af65701dbc2839df3524980d3 (patch)
tree3bc3fd6637b587ce5d1562a41df0d83145eeac10 /Documentation/devicetree/bindings/clock/tango4-clock.txt
parenta085f877a882b465fce74188c9d8efd12bd5acd4 (diff)
clk: tango4: clkgen driver for Tango4 platforms
Provide support for Sigma Designs Tango4 clock generator. NOTE: This driver is incompatible with Tango3 clkgen. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> [sboyd@codeaurora.org: Add kernel.h include for panic/sprintf] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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+* Sigma Designs Tango4 Clock Generator
+
+The Tango4 clock generator outputs cpu_clk and sys_clk (the latter is used
+for RAM and various peripheral devices). The clock binding described here
+is applicable to all Tango4 SoCs.
+
+Required Properties:
+
+- compatible: should be "sigma,tango4-clkgen".
+- reg: physical base address of the device and length of memory mapped region.
+- clocks: phandle of the input clock (crystal oscillator).
+- clock-output-names: should be "cpuclk" and "sysclk".
+- #clock-cells: should be set to 1.
+
+Example:
+
+ clkgen: clkgen@10000 {
+ compatible = "sigma,tango4-clkgen";
+ reg = <0x10000 0x40>;
+ clocks = <&xtal>;
+ clock-output-names = "cpuclk", "sysclk";
+ #clock-cells = <1>;
+ };