diff options
| author | Joseph Lo <josephl@nvidia.com> | 2019-01-04 11:06:44 +0800 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-02-06 14:27:21 +0100 |
| commit | 7e9d10985856dcbcc8f56f97cb103eb3349b3f12 (patch) | |
| tree | ab771419635dfff2cc3f0bb2482de3ea2920cba7 /Documentation/devicetree/bindings/clock | |
| parent | 93caec0042659bf17ec217b09857bd5eaeca6804 (diff) | |
dt-bindings: clock: tegra124-dfll: add Tegra210 support
Add Tegra210 support for DFLL clock.
Cc: devicetree@vger.kernel.org
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt index 5558bb5fcf2c..958e0ad78c52 100644 --- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt +++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-dfll.txt @@ -10,7 +10,9 @@ control module that will automatically adjust the VDD_CPU voltage by communicating with an off-chip PMIC either via an I2C bus or via PWM signals. Required properties: -- compatible : should be "nvidia,tegra124-dfll" +- compatible : should be one of: + - "nvidia,tegra124-dfll": for Tegra124 + - "nvidia,tegra210-dfll": for Tegra210 - reg : Defines the following set of registers, in the order listed: - registers for the DFLL control logic. - registers for the I2C output logic. |