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| author | Wen He <wen.he_1@nxp.com> | 2019-11-27 11:19:26 +0800 |
|---|---|---|
| committer | Wen He <wen.he_1@nxp.com> | 2019-11-27 17:53:48 +0800 |
| commit | 988d0a7af732d7bca0aff2ffa3d82490ff8c81d6 (patch) | |
| tree | cf8d2398ffa3b7c06ddc0ea6fcb19a562400fc08 /Documentation/devicetree/bindings/clock | |
| parent | cfa43c88cac45dd052dddc8ad1041d5a08700d64 (diff) | |
clk: ls1028a: Add clock driver for Display output interface
Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY),
as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable
integer division and range of the display output pixel clock's 27-594MHz.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
0 files changed, 0 insertions, 0 deletions