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authorStephen Boyd <sboyd@kernel.org>2019-04-25 08:56:23 -0700
committerStephen Boyd <sboyd@kernel.org>2019-04-25 08:56:23 -0700
commitd3dfc16f8fa10e026509130cd705fd7dc925c946 (patch)
tree757c600c68d2faf318c89954b885a8a82e1d8a8f /Documentation/devicetree/bindings/clock
parent9e98c678c2d6ae3a17cb2de55d17f69dddaa231b (diff)
parentf4033db5b84ebe4b32c25ba2ed65ab20b628996a (diff)
Merge tag 'v5.2-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull Rockchip clk driver updates from Heiko Stuebner: - Fixes for rk3328 and rk3288 - New sub-type for an upcoming SoC where mux and divider are not necessarily in the same register anymore * tag 'v5.2-rockchip-clk-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: clk: rockchip: undo several noc and special clocks as critical on rk3288 clk: rockchip: add a COMPOSITE_DIV_OFFSET clock-type clk: rockchip: Turn on "aclk_dmac1" for suspend on rk3288 clk: rockchip: Limit use of USB PHY clock to USB on rk3288 clk: rockchip: Fix video codec clocks on rk3288 clk: rockchip: Make rkpwm a critical clock on rk3288 clk: rockchip: fix wrong clock definitions for rk3328
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