diff options
| author | Fugang Duan <b38611@freescale.com> | 2015-08-14 14:46:23 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-02 16:50:59 +0800 |
| commit | f2e5867478c7800d799302b809e460ab16eb8ab4 (patch) | |
| tree | 24781699163b19bbb861f3dee39890ef293f35c6 /Documentation/devicetree/bindings/crypto/fsl-sec4.txt | |
| parent | adbfc4b8efeccbc01575060871b8587c09ccebd3 (diff) | |
MLKU-38-1 dt-bindings: crypto: fsl: add snvs clock management
This is a rework of the following i.MX BSP commit
(rel_imx_4.19.35_1.1.0_rc2):
3ac6edcd92d4 ("MLK-11360-01 crypto: caam_snvs: add snvs clock management")
caam_snvs driver involves snvs HP registers access that needs to
enable snvs clock source. The patch add the clock management.
Signed-off-by: Andy Duan <fugang.duan@nxp.com>
Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Diffstat (limited to 'Documentation/devicetree/bindings/crypto/fsl-sec4.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index 8f359f473ada..c605f090347c 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt @@ -394,18 +394,14 @@ Secure Non-Volatile Storage (SNVS) Low Power (LP) RTC Node value type: <u32> Definition: LP register offset. default it is 0x34. - - clocks - Usage: optional, required if SNVS LP RTC requires explicit - enablement of clocks - Value type: <prop_encoded-array> - Definition: a clock specifier describing the clock required for - enabling and disabling SNVS LP RTC. - - - clock-names - Usage: optional, required if SNVS LP RTC requires explicit - enablement of clocks - Value type: <string> - Definition: clock name string should be "snvs-rtc". + - clocks + Usage: optional + Value type: <prop-encoded-array> + Definition: A standard property. Specifies the source clock for + snvs register access. If i.MX clk driver defines the clock node, + it needs user to specify the clocks in device tree for all modules + with snvs LP/HP registers access. The modules involved snvs LP/HP + registers access are snvs-power key, snvs-rtc, and caam. EXAMPLE sec_mon_rtc_lp@1 { |