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authorGregory CLEMENT <gregory.clement@bootlin.com>2018-03-13 17:48:42 +0100
committerHerbert Xu <herbert@gondor.apana.org.au>2018-03-23 23:40:04 +0800
commit1d17cbfbb55cd80890312dd8c64d0008b25b05c0 (patch)
tree7616716634ca26e4dffe5cfd5fabf811a79b8589 /Documentation/devicetree/bindings/crypto
parent5b37689653cbe73d24760428c236feb15ccad2aa (diff)
crypto: inside-secure - fix clock resource by adding a register clock
On Armada 7K/8K we need to explicitly enable the register clock. This clock is optional because not all the SoCs using this IP need it but at least for Armada 7K/8K it is actually mandatory. The binding documentation is updated accordingly. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'Documentation/devicetree/bindings/crypto')
-rw-r--r--Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt6
1 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt
index 30c3ce6b502e..5dba55cdfa63 100644
--- a/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt
+++ b/Documentation/devicetree/bindings/crypto/inside-secure-safexcel.txt
@@ -8,7 +8,11 @@ Required properties:
- interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".
Optional properties:
-- clocks: Reference to the crypto engine clock.
+- clocks: Reference to the crypto engine clocks, the second clock is
+ needed for the Armada 7K/8K SoCs.
+- clock-names: mandatory if there is a second clock, in this case the
+ name must be "core" for the first clock and "reg" for
+ the second one.
Example: