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authorLukasz Luba <l.luba@partner.samsung.com>2019-08-21 12:42:56 +0200
committerKrzysztof Kozlowski <krzk@kernel.org>2019-10-01 20:29:02 +0200
commite9920bc28a4f9d677f1cf49223142a405c4d615f (patch)
treedadf0c4de1ecd85525e59a246881aecdb51cd310 /Documentation/devicetree/bindings/ddr/lpddr2-timings.txt
parent54ecb8f7028c5eb3d740bb82b0f1d90f2df63c5c (diff)
dt-bindings: ddr: Rename lpddr2 directory
Change directory name to be ready for new types of memories. Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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+* AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
+
+Required properties:
+- compatible : Should be "jedec,lpddr2-timings"
+- min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
+- max-freq : maximum DDR clock frequency for the speed-bin. Type is <u32>
+
+Optional properties:
+
+The following properties represent AC timing parameters from the memory
+data-sheet of the device for a given speed-bin. All these properties are
+of type <u32> and the default unit is ps (pico seconds). Parameters with
+a different unit have a suffix indicating the unit such as 'tRAS-max-ns'
+- tRCD
+- tWR
+- tRAS-min
+- tRRD
+- tWTR
+- tXP
+- tRTP
+- tDQSCK-max
+- tFAW
+- tZQCS
+- tZQinit
+- tRPab
+- tZQCL
+- tCKESR
+- tRAS-max-ns
+- tDQSCK-max-derated
+
+Example:
+
+timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
+ compatible = "jedec,lpddr2-timings";
+ min-freq = <10000000>;
+ max-freq = <400000000>;
+ tRPab = <21000>;
+ tRCD = <18000>;
+ tWR = <15000>;
+ tRAS-min = <42000>;
+ tRRD = <10000>;
+ tWTR = <7500>;
+ tXP = <7500>;
+ tRTP = <7500>;
+ tCKESR = <15000>;
+ tDQSCK-max = <5500>;
+ tFAW = <50000>;
+ tZQCS = <90000>;
+ tZQCL = <360000>;
+ tZQinit = <1000000>;
+ tRAS-max-ns = <70000>;
+};