diff options
| author | Chanwoo Choi <cw00.choi@samsung.com> | 2015-11-27 13:03:59 +0900 |
|---|---|---|
| committer | MyungJoo Ham <myungjoo.ham@samsung.com> | 2016-05-03 11:22:06 +0900 |
| commit | a9d1f4e0cb80b917f68e5b007436d50797c4eeab (patch) | |
| tree | dfad679ea0d780c9605ca318bc0e3e1e14c10ac9 /Documentation/devicetree/bindings/devfreq | |
| parent | 19cf91d0f9ddc494217a0abaed91dfbddea7c958 (diff) | |
PM / devfreq: exynos: Add the detailed correlation for Exynos5422 bus
This patch adds the detailed corrleation between sub-blocks and power line
for Exynos5422.
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Diffstat (limited to 'Documentation/devicetree/bindings/devfreq')
| -rw-r--r-- | Documentation/devicetree/bindings/devfreq/exynos-bus.txt | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt index 7dbd4abfca33..d3ec8e676b6b 100644 --- a/Documentation/devicetree/bindings/devfreq/exynos-bus.txt +++ b/Documentation/devicetree/bindings/devfreq/exynos-bus.txt @@ -104,6 +104,25 @@ Detailed correlation between sub-blocks and power line according to Exynos SoC: |--- LCD0 |--- ISP +- In case of Exynos5422, there are two power line as following: + VDD_MIF |--- DREX 0 (parent device, DRAM EXpress controller) + |--- DREX 1 + + VDD_INT |--- NoC_Core (parent device) + |--- G2D + |--- G3D + |--- DISP1 + |--- NoC_WCORE + |--- GSCL + |--- MSCL + |--- ISP + |--- MFC + |--- GEN + |--- PERIS + |--- PERIC + |--- FSYS + |--- FSYS2 + Example1: Show the AXI buses of Exynos3250 SoC. Exynos3250 divides the buses to power line (regulator). The MIF (Memory Interface) AXI bus is used to |