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author | Laurentiu Palcu <laurentiu.palcu@nxp.com> | 2019-09-19 17:14:18 +0300 |
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committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:01:31 +0800 |
commit | b47bad65a5e49f4f3c73bbecd662d4d78e8709f2 (patch) | |
tree | b23097f5084a5480f9e77001538f6c3f61eb26c6 /Documentation/devicetree/bindings/display | |
parent | ba6f14e6f2031106ba545f0a6e0c38feca2640d8 (diff) |
dt-bindings: display: imx: add bindings for DCSS
Add bindings for iMX8MQ Display Controller Subsystem.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Diffstat (limited to 'Documentation/devicetree/bindings/display')
-rw-r--r-- | Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml | 86 |
1 files changed, 86 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml new file mode 100644 index 000000000000..efd24944b212 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 NXP +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: iMX8MQ Display Controller Subsystem (DCSS) + +maintainers: + - Laurentiu Palcu <laurentiu.palcu@nxp.com> + +description: + + The DCSS (display controller sub system) is used to source up to three + display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP + 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10 + image processing capabilities are included to provide a solution capable of + driving next generation high dynamic range displays. + +properties: + compatible: + const: nxp,imx8mq-dcss + + reg: + maxItems: 2 + + interrupts: + maxItems: 3 + items: + - description: Context loader completion and error interrupt + - description: DTG interrupt used to signal context loader trigger time + - description: DTG interrupt for Vblank + + interrupt-names: + maxItems: 3 + items: + - const: ctx_ld + - const: ctxld_kick + - const: vblank + + clocks: + maxItems: 5 + items: + - description: Display APB clock for all peripheral PIO access interfaces + - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL + - description: RTRAM clock + - description: Pixel clock, can be driver either by HDMI phy clock or MIPI + - description: DTRC clock, needed by video decompressor + + clock-names: + items: + - const: apb + - const: axi + - const: rtrm + - const: pix + - const: dtrc + + port@0: + type: object + description: A port node pointing to a hdmi_in or mipi_in port node. + +examples: + - | + dcss: display-controller@32e00000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "nxp,imx8mq-dcss"; + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; + interrupts = <6>, <8>, <9>; + interrupt-names = "ctx_ld", "ctxld_kick", "vblank"; + interrupt-parent = <&irqsteer>; + clocks = <&clk 248>, <&clk 247>, <&clk 249>, + <&clk 254>,<&clk 122>; + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; + assigned-clocks = <&clk 107>, <&clk 109>, <&clk 266>; + assigned-clock-parents = <&clk 78>, <&clk 78>, <&clk 3>; + assigned-clock-rates = <800000000>, + <400000000>; + port@0 { + dcss_out: endpoint { + remote-endpoint = <&hdmi_in>; + }; + }; + }; + |