Merge remote-tracking branch 'origin/display/bridge' into display/next

* origin/display/bridge: (50 commits)
  drm/bridge: adv7511: Fix of_reconfig
  MLK-21958-13: drm/bridge: adv7511: Limit supported clocks
  MLK-17275-2: drm/bridge: it6263: Add support for OF_DYNAMIC
  MLK-20438 drm/bridge: sec-dsim: remove 'FORCEBTA' for packet send
  MLK-20687 drm/bridge: sec-dsim: correct LPM config for Long Packet
  ...

3 files changed, 108 insertions, 12 deletions

diff --git a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
index 2c887536258c..0c0b12e58843 100644
--- a/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
+++ b/Documentation/devicetree/bindings/display/bridge/adi,adv7511.txt
@@ -1,10 +1,10 @@
-Analog Device ADV7511(W)/13/33 HDMI Encoders
+Analog Device ADV7511(W)/13/33/35 HDMI Encoders
 -----------------------------------------
 
-The ADV7511, ADV7511W, ADV7513 and ADV7533 are HDMI audio and video transmitters
-compatible with HDMI 1.4 and DVI 1.0. They support color space conversion,
-S/PDIF, CEC and HDCP. ADV7533 supports the DSI interface for input pixels, while
-the others support RGB interface.
+The ADV7511, ADV7511W, ADV7513, ADV7533 and ADV7535 are HDMI audio and video
+transmitters compatible with HDMI 1.4 and DVI 1.0. They support color space
+conversion, S/PDIF, CEC and HDCP. ADV7533 and ADV7535 support the DSI interface
+for input pixels, while the others support RGB interface.
 
 Required properties:
 
@@ -13,6 +13,7 @@ Required properties:
 		"adi,adv7511w"
 		"adi,adv7513"
 		"adi,adv7533"
+		"adi,adv7535"
 
 - reg: I2C slave addresses
   The ADV7511 internal registers are split into four pages exposed through
@@ -52,7 +53,7 @@ The following input format properties are required except in "rgb 1x" and
 - bgvdd-supply: A 1.8V supply that powers up the BGVDD pin. This is
   needed only for ADV7511.
 
-The following properties are required for ADV7533:
+The following properties are required for ADV7533 and ADV7535:
 
 - adi,dsi-lanes: Number of DSI data lanes connected to the DSI host. It should
   be one of 1, 2, 3 or 4.
@@ -71,23 +72,31 @@ Optional properties:
 - adi,embedded-sync: The input uses synchronization signals embedded in the
   data stream (similar to BT.656). Defaults to separate H/V synchronization
   signals.
-- adi,disable-timing-generator: Only for ADV7533. Disables the internal timing
-  generator. The chip will rely on the sync signals in the DSI data lanes,
-  rather than generate its own timings for HDMI output.
+- adi,disable-timing-generator: Only for ADV7533 and ADV7535. Disables the
+  internal timing generator. The chip will rely on the sync signals in the DSI
+  data lanes, rather than generate its own timings for HDMI output.
 - clocks: from common clock binding: reference to the CEC clock.
 - clock-names: from common clock binding: must be "cec".
 - reg-names : Names of maps with programmable addresses.
 	It can contain any map needing a non-default address.
 	Possible maps names are : "main", "edid", "cec", "packet"
+- adi,dsi-channel: Only for ADV7533 and ADV7535. DSI channel number to be used
+  when communicating with the DSI peripheral. It should be one of 0, 1, 2 or 3.
+- adi,addr-cec: Only for ADV7533 and ADV7535. The I2C DSI-CEC register map
+  address to be programmed into the MAIN register map.
+- adi,addr-edid: Only for ADV7533 and ADV7535. The I2C EDID register map
+  to be programmed into the MAIN register map.
+- adi,addr-pkt: Only for ADV7533 and ADV7535. The I2C PACKET register map
+  to be programmed into the MAIN register map.
 
 Required nodes:
 
 The ADV7511 has two video ports. Their connections are modelled using the OF
 graph bindings specified in Documentation/devicetree/bindings/graph.txt.
 
-- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533, the
-  remote endpoint phandle should be a reference to a valid mipi_dsi_host device
-  node.
+- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533 and
+  ADV7535, the remote endpoint phandle should be a reference to a valid
+  mipi_dsi_host device node.
 - Video port 1 for the HDMI output
 - Audio port 2 for the HDMI audio input
 
diff --git a/Documentation/devicetree/bindings/display/bridge/it6263.txt b/Documentation/devicetree/bindings/display/bridge/it6263.txt
new file mode 100644
index 000000000000..dc032dbdc6b3
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/it6263.txt
@@ -0,0 +1,27 @@
+ITE IT6263 LVDS to HDMI bridge bindings
+
+Required properties:
+	- compatible: "ite,it6263"
+	- reg: i2c address of the bridge
+	- video input: this subnode can contain a video input port node
+	  to connect the bridge to a LVDS output interface (See this
+	  documentation [1]).
+
+Optional properties:
+	- split-mode: boolean. if this exists, split mode is enabled,
+	  otherwise, single mode is enabled.
+	- reset-gpios: OF device-tree gpio specification for SYSRSTN pin.
+
+[1]: Documentation/devicetree/bindings/media/video-interfaces.txt
+
+Example:
+	lvds-to-hdmi-bridge@4c {
+		compatible = "ite,it6263";
+		reg = <0x4c>;
+
+		port {
+			it6263_0_in: endpoint {
+				remote-endpoint = <&lvds0_out>;
+			};
+		};
+	};
diff --git a/Documentation/devicetree/bindings/display/bridge/sec_dsim.txt b/Documentation/devicetree/bindings/display/bridge/sec_dsim.txt
new file mode 100644
index 000000000000..fd4246136d37
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/sec_dsim.txt
@@ -0,0 +1,60 @@
+Samsung MIPI DSIM bridge bindings
+
+The MIPI DSIM host controller drives the video signals from
+display controller to video peripherals using DSI protocol.
+This is an un-managed DSI bridge. In order to use this bridge,
+an encoder or bridge must be implemented to manage the platform
+specific initializations.
+
+Required properties:
+- compatible: 		"fsl,imx8mm-mipi-dsim"
+- reg: 			the register range of the MIPI DSIM controller
+- interrupts: 		the interrupt number for this module
+- clock, clock-names: 	phandles to the MIPI-DSI clocks described in
+  Documentation/devicetree/bindings/clock/clock-bindings.txt
+	"cfg"		- DSIM access clock
+	"pll-ref"	- DSIM PHY PLL reference clock
+- assigned-clocks:	phandles to clocks that requires initial configuration
+- assigned-clock-rates:	rates of the clocks that requires initial configuration
+- pref-clk:		Assign DPHY PLL reference clock frequency. If not exists,
+			DSIM bridge driver will use the default lock frequency
+			which is 27MHz.
+- port: 		input and output port nodes with endpoint definitions as
+			defined in Documentation/devicetree/bindings/graph.txt;
+			the input port should be connected to an encoder or a
+			bridge that manages this MIPI DSIM host and the output
+			port should be connected to a panel or a bridge input
+			port
+
+Optional properties:
+-dsi-gpr:		a phandle which provides the MIPI DSIM control and gpr registers
+
+example:
+	mipi_dsi: mipi_dsi@32E10000 {
+		compatible = "fsl,imx8mm-mipi-dsim";
+		reg = <0x0 0x32e10000 0x0 0x400>;
+		clocks = <&clk IMX8MM_CLK_DSI_CORE_DIV>,
+			 <&clk IMX8MM_CLK_DSI_PHY_REF_DIV>;
+		clock-names = "cfg", "pll-ref";
+		assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE_SRC>,
+				  <&clk IMX8MM_CLK_DSI_PHY_REF_SRC>;
+		assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>,
+					 <&clk IMX8MM_VIDEO_PLL1_OUT>;
+		assigned-clock-rates = <266000000>, <594000000>;
+		interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+		dsi-gpr = <&dispmix_gpr>;
+		status = "disabled";
+
+		port@0 {
+			dsim_from_lcdif: endpoint {
+				remote-endpoint = <&lcdif_to_dsim>;
+			};
+		};
+
+		port@1 {
+			dsim_to_adv7535: endpoint {
+				remote-endpoint = <&adv7535_from_dsim>;
+			};
+		};
+
+	};