diff options
| author | Robin Gong <yibin.gong@nxp.com> | 2019-04-17 17:05:42 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-02 16:47:39 +0800 |
| commit | ae2e5e4aa348314ce5b2f9a355120f286fc68466 (patch) | |
| tree | 0187919e45a00cafaa35406265ae292efebe1e57 /Documentation/devicetree/bindings/dma | |
| parent | 492882927f7fd6d9b25ba8225043978acfdfe3a8 (diff) | |
MLK-22284-1 dmaengine: fsl-edma-v3: add power domains for each channel
Add power domains for each dma channel so that edma channel could
know the power state of every dma channel anytime and clear easily
unexpected interrupt which triggered before the last partition reset.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
Reviewed-by: S.j. Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 0b6da46b7bdb2284e24757d48466268b9feb5b7c)
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
| -rw-r--r-- | Documentation/devicetree/bindings/dma/fsl-edma-v3.txt | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt b/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt index a8d05427f954..8fe82ce63632 100644 --- a/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt +++ b/Documentation/devicetree/bindings/dma/fsl-edma-v3.txt @@ -30,6 +30,8 @@ Required properties: 0: not dual fifo case, 1: dualfifo case. See the SoC's reference manual for all the supported request sources. - dma-channels : Number of channels supported by the controller +- power-domains: Power domains for edma channel used. +- power-domain-names: Power domains name for edma channel used. Examples: edma0: dma-controller@40018000 { @@ -46,6 +48,12 @@ edma0: dma-controller@40018000 { <GIC_SPI 437 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "edma0-chan12-rx", "edma0-chan13-tx", "edma0-chan14-rx", "edma0-chan15-tx"; + power-domains = <&pd IMX_SC_R_DMA_0_CH12>, + <&pd IMX_SC_R_DMA_0_CH13>, + <&pd IMX_SC_R_DMA_0_CH14>, + <&pd IMX_SC_R_DMA_0_CH15>; + power-domain-names = "edma0-chan12", "edma0-chan13", + "edma0-chan14", "edma0-chan15"; status = "okay"; }; @@ -65,7 +73,8 @@ lpuart1: serial@5a070000 { clock-names = "ipg"; assigned-clock-names = <&clk IMX8QM_UART1_CLK>; assigned-clock-rates = <80000000>; - power-domains = <&pd_dma_lpuart1>; + power-domains = <&pd IMX_SC_R_UART_1>, + power-domain-names = "uart"; dma-names = "tx","rx"; dmas = <&edma0 15 0 0>, <&edma0 14 0 1>; |