diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-10-12 01:41:02 +0900 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2018-11-24 19:42:59 +0530 |
| commit | eeea81474bc40402d8037e73ee1751db65f25176 (patch) | |
| tree | 3aeaacf318199237d78ece587aaf924b45d7138d /Documentation/devicetree/bindings/dma | |
| parent | 651022382c7f8da46cb4872a545ee1da6d097d2a (diff) | |
dt-bindings: dmaengine: add DT binding for UniPhier MIO DMAC
The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4,
Pro4, and sLD8 SoCs.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
| -rw-r--r-- | Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt new file mode 100644 index 000000000000..b12388dc7eac --- /dev/null +++ b/Documentation/devicetree/bindings/dma/uniphier-mio-dmac.txt @@ -0,0 +1,25 @@ +UniPhier Media IO DMA controller + +This works as an external DMA engine for SD/eMMC controllers etc. +found in UniPhier LD4, Pro4, sLD8 SoCs. + +Required properties: +- compatible: should be "socionext,uniphier-mio-dmac". +- reg: offset and length of the register set for the device. +- interrupts: a list of interrupt specifiers associated with the DMA channels. +- clocks: a single clock specifier. +- #dma-cells: should be <1>. The single cell represents the channel index. + +Example: + dmac: dma-controller@5a000000 { + compatible = "socionext,uniphier-mio-dmac"; + reg = <0x5a000000 0x1000>; + interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, + <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>; + clocks = <&mio_clk 7>; + #dma-cells = <1>; + }; + +Note: +In the example above, "interrupts = <0 68 4>, <0 68 4>, ..." is not a typo. +The first two channels share a single interrupt line. |