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authorAlan Tull <atull@opensource.altera.com>2016-10-17 11:09:34 -0500
committerRob Herring <robh@kernel.org>2016-11-18 11:55:18 -0600
commit3c263bc7b7270aec7d97edb5625b795707d2f1fa (patch)
tree7ad59f91563cc7006f031abc13700ab531456329 /Documentation/devicetree/bindings/fpga
parent1adcbea4201a6852362aa5ece573f1f169b28113 (diff)
add bindings document for altera freeze bridge
Add bindings document for the Altera Freeze Bridge. A Freeze Bridge is used to gate traffic to/from a region of a FPGA such that that region can be reprogrammed. The Freeze Bridge exist in FPGA fabric that is not currently being reconfigured. Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/fpga')
-rw-r--r--Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt23
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
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+++ b/Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
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+Altera Freeze Bridge Controller Driver
+
+The Altera Freeze Bridge Controller manages one or more freeze bridges.
+The controller can freeze/disable the bridges which prevents signal
+changes from passing through the bridge. The controller can also
+unfreeze/enable the bridges which allows traffic to pass through the
+bridge normally.
+
+Required properties:
+- compatible : Should contain "altr,freeze-bridge-controller"
+- regs : base address and size for freeze bridge module
+
+Optional properties:
+- bridge-enable : 0 if driver should disable bridge at startup
+ 1 if driver should enable bridge at startup
+ Default is to leave bridge in current state.
+
+Example:
+ freeze-controller@100000450 {
+ compatible = "altr,freeze-bridge-controller";
+ regs = <0x1000 0x10>;
+ bridge-enable = <0>;
+ };