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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-10-11 10:55:04 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-10-11 10:55:04 +0100 |
commit | a0f0dd57f4a85310d9936f1770a0424b49fef876 (patch) | |
tree | 2f85b8b67dda13d19b02ca39e0fbef921cb1cf8b /Documentation/devicetree/bindings/gpio/gpio-74x164.txt | |
parent | 2a552d5e63d7fa602c9a9a0717008737f55625a6 (diff) | |
parent | 846a136881b8f73c1f74250bf6acfaa309cab1f2 (diff) |
Merge branch 'fixes' into for-linus
Conflicts:
arch/arm/kernel/smp.c
Diffstat (limited to 'Documentation/devicetree/bindings/gpio/gpio-74x164.txt')
-rw-r--r-- | Documentation/devicetree/bindings/gpio/gpio-74x164.txt | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-74x164.txt b/Documentation/devicetree/bindings/gpio/gpio-74x164.txt new file mode 100644 index 000000000000..cc2608021f26 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-74x164.txt @@ -0,0 +1,22 @@ +* Generic 8-bits shift register GPIO driver + +Required properties: +- compatible : Should be "fairchild,74hc595" +- reg : chip select number +- gpio-controller : Marks the device node as a gpio controller. +- #gpio-cells : Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity: + 0 = active high + 1 = active low +- registers-number: Number of daisy-chained shift registers + +Example: + +gpio5: gpio5@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <4>; + spi-max-frequency = <100000>; +}; |