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authorThierry Reding <treding@nvidia.com>2015-07-30 10:34:24 +0200
committerThierry Reding <treding@nvidia.com>2015-08-13 13:49:37 +0200
commit459cc2c6800b545a482e428a631d99bca8da7790 (patch)
treed7b372fdf731bee5ec6dcf820f4eafcd804e9f58 /Documentation/devicetree/bindings/gpu
parent3309ac836229d8bc3db7618e04a51334bef13b0a (diff)
drm/tegra: sor: Add HDMI support
The SOR1 introduced on Tegra210 supports HDMI 2.0 and DisplayPort. Add HDMI support and name the debugfs node after the type of SOR. The SOR introduced with Tegra124 is known simply as "sor", whereas the additional SOR found on Tegra210 is known as "sor1". Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/gpu')
-rw-r--r--Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
index 626115911282..e685610d38e2 100644
--- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt
@@ -201,6 +201,7 @@ of the following host1x client modules:
- "nvidia,tegra124-sor": for Tegra124 and Tegra132
- "nvidia,tegra132-sor": for Tegra132
- "nvidia,tegra210-sor": for Tegra210
+ - "nvidia,tegra210-sor1": for Tegra210
- reg: Physical base address and length of the controller's registers.
- interrupts: The interrupt outputs from the controller.
- clocks: Must contain an entry for each entry in clock-names.